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MIPS Launches Workload-Native Platforms for Physical AI

Inference-Native: MIPS Acies™ is an AI inference developer platform for modern edge workloads, with an open, standards-based NPU, an open software stack, and...

MIPS Leads Open Standards Development for Physical AI Platforms as RISC-V International Premier Member

MIPS combines foundry scale, processor IP, software-first design tools, and open standards leadership to help customers build workload-optimized computing platforms for AI...

GlobalFoundries completes acquisition of Synopsys’ Processor IP Solutions Business, delivering a holistic technology platform for Physical AI

Combines GF’s Physical AI portfolio with MIPS’ RISC-V and software-to-silicon expertise to accelerate custom, software-first products for automotive, industrial and agentic edge platforms...

MIPS and INOVA Collaborate to put Physical AI into the palm of Robotic hands with new Reference Platform

Inova Semiconductors collaborate with MIPS to build reference Physical AI platform for secure architectures in Robotics applications New platform will be a hardware-based...

MIPS and Green Hills Software Accelerate Safety Certified Product Development for MIPS RISC-V Microcontrollers

Collaboration accelerates time-to-market for mission-critical applications in automotive and industrial markets Designed for real-time, event-driven Physical AI action platforms that need safety certification...

GlobalFoundries to Acquire Synopsys’ Processor IP Solutions Business, Expanding Capabilities to Accelerate Physical AI Applications

Acquisition will strengthen GF’s leadership in Physical AI, enhances compute capabilities, expands company’s RISC-V and AI portfolio and software tools and accelerates custom...

MIPS S8200 Delivers Software-First RISC-V NPU To Enable Physical AI at the Autonomous Edge

MIPS S8200 NPU is sampling now to lead customers developing autonomous edge transportation, robotics, and embedded platforms ForwardEdge ASIC selects MIPS S8200 NPU...

Siemens and GlobalFoundries collaborate to deploy AI-driven manufacturing to strengthen global semiconductor supply

Strategic collaboration to enhance performance of semiconductors and other advanced industries based on both companies’ AI-based capabilities Centralized AI-enabled automation, predictive maintenance, advanced...

Quintauris Announces Strategic Collaboration with MIPS to enable MIPS Atlas as part of RT-Europa

Quintauris, a leading provider of RISC-V solutions, and MIPS, a GlobalFoundries company and leading provider of RISC-V IP and software for physical AI...

MIPS I8500 Processor Orchestrates Data Movement for the AI Era

MIPS I8500 delivers deterministic, secure data orchestration for Physical AI with 3rd generation four-thread-per-core processor built using open RISC-V ISA SAN JOSE, Calif.,...

MIPS Appoints Moshe Hillel to Accelerate Growth in Israel

MIPS business development in Israel will drive Automotive, Industrial, Data Center Infrastructure, and Communications Infrastructure market growth, fueled by the open and modular...

MIPS Appoints Alan Li as Head of Business Development to Accelerate China Growth

MIPS China business development team has strong focus on Automotive, Industrial, and Communications Infrastructure market growth, leveraging the industry-leading MIPS Atlas Portfolio of...

EE Times: RISC-V Summit 2022: All Your CPUs Belong to Us

MIPS announced that Mobileye adopted its eVocore P8700 for the next-generation EyeQ SoC for autonomous driving and advanced driver assistance systems (ADAS).

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All About Circuits: “RISC-V is Inevitable”—A Tale of Two RISC-V Summit Keynotes

RISC-V is everywhere. RISC-V is redefining computing. And that’s not just for this quarter. This is for the next era of computing.

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New Electronics: MIPS makes first RISC-V IP core available

MIPS, a developer of scalable RISC processor IP, has announced the availability of the eVocore P8700, said to be the industry’s highest performance,...

EE World Online: Scalable RISC-V multiprocessor IP promotes efficient SoC uses

MIPS has announced the availability of the eVocore P8700, the industry’s highest-performance, most scalable RISC-V multiprocessor IP. The P8700 has already been licensed...

Forbes: MIPS Joins The RISC-V Gang

Perhaps the biggest news at the RISC-V Summit came from MIPS. The story of MIPS is as full of twists, turns, and surprises...

Design & Reuse: RISC-V Sees Significant Growth and Technical Progress in 2022 with Billions of RISC-V Cores in Market

Members across the ecosystem have continued to innovate with cutting-edge RISC-V hardware and software solutions. MIPS announced the availability of its first RISC-V...

Tech Insights: MIPS Releases First RISC-V CPUs

MIPS has developed its first licensable CPUs implementing the RISC-V instruction set by repurposing older MIPS-compatible cores. The P8700 and I8500 outperform most...

MIPS pivots to RISC-V, targets high performance processing

With its transition to RISC-V, MIPS is targeting the high-performance segment of the processor market, leveraging its differentiation in real-time features

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EENews Europe: MIPS Previews its Pivot to RISC-V

MIPS is showing the first results of its pivot to the RISC-V architecture following the collapse of Wave Computing.

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New Electronics: MIPS enters RISC-V market with eVocore product line-up

MIPS, a developer of RISC processor IP, is entering into the RISC-V market and has offered previews of its first products in its...

CNX Software: MIPS unveils RISC-V eVocore P8700 and I8500 multiprocessor IP cores

MIPS is dead, right? Well, there’s now very little done on the architecture itself, MIPS (the company) has decided to switch to RISC-V...

HPC Wire: MIPS Pivots to RISC-V with Performance and Scalability

SAN JOSE, Calif., May 10, 2022 — MIPS, a leading developer of highly scalable RISC processor IP, announces its entrance to the RISC-V...

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