Discover the Latest from MIPS

Product News, Industry Insights, Announcements, and More

MIPS Continues To Expand With The Addition Of Industry Leaders from NVIDIA, Google and SiFive

Executives’ Technical Prowess Will Help Drive Innovation and Accelerate Product Development to Meet Customer Demand for AI Compute and RISC-V SAN JOSE,

MIPS Expands RISC-V Ecosystem Support to Enable Early Software Development for Multi-threaded Cores

Live Demonstration of Synopsys ImperasFPM Models for MIPS Processors at Embedded World 2024 Showcases Collaboration for RISC-V-Based Designs SAN JOSE, CA –

MIPS Expands Global Footprint with New Design Center and Talent for Systems Architects and AI Compute

MIPS, a leading developer of efficient and configurable compute cores, today announced the company’s global expansion with the launch of a new

MIPS Launches New Corporate Brand At CES 2024

Rebrand Reflects the Company’s Strategic Focus on Giving Customers the Freedom to Innovate Compute in the Automotive, Data Center and Embedded Markets.

MIPS: Freedom to Innovate Compute

Watch the Video: At MIPS, we are giving our customers the freedom to innovate compute in the automotive, data center and embedded

MIPS Welcomes New Executives as Part of Company’s Growth and Expansion

Former SiFive Leaders to Help Drive IP Innovation and Market Penetration SAN JOSE, CA – January 03, 2024 – MIPS, a leading

MIPS Takes Top Honors at Embedded World for eVocore P8700 Multiprocessor

Company’s First RISC-V Product Paves Way for Future of Chip Development   SAN JOSE, Calif., March 16, 2023 /PRNewswire/ — MIPS, a

MIPS Leverages Siemens’ Veloce proFPGA platform to Implement and Make Available Capabilities of its New High-Performance eVocore P8700 RISC-V Multiprocessor

New Platform to Accelerate Time-to-Market and Reduce Costs & Bottlenecks for SoC Developers   SAN JOSE, Calif., May 30, 2023 /PRNewswire/ —

Imperas Collaborates with MIPS and Ashling to Accelerate RISC-V Application Software Development from SoC Concept to Deployment

Oxford, United Kingdom – March 13th, 2023 – Imperas Software Ltd., the leader in RISC-V models and simulation solutions, today announced with

MIPS Named Embedded Award Nominee for eVocore P8700 Multiprocessor

Prestigious Global Industry Accolades Honor Top Embedded Systems Innovations SAN JOSE, Calif., Feb. 28, 2023 — MIPS, a leading developer of highly

MIPS Announces Availability of its first RISC-V IP core – the eVocore P8700 Multiprocessor

Industry’s Highest Performance, Most Scalable RISC-V IP Core Already Adopted for Next-Generation Automotive Applications San Jose, Calif., Dec. 12, 2022 — As

MIPS Partners With Mobileye to Accelerate Next Generation Autonomous Driving Technologies and Advanced Driver Assistance Systems

Mobileye Adopts New MIPS eVocore RISC-V CPUs; RISC-V Architecture to Help Drive Future of Vehicle Safety San Jose, Calif., December 12, 2022-

Why is MIPS Putting its Primary Focus on RISC-V?

MIPS has been know for delivering low power, high performance embedded processor designs but its MIPS architecture has been eclipsed by other

Is MIPS Poised to Take the RISC-V World by Storm?

Sometimes the world can be a funny old place. Take computer companies, for example. Some (like IBM) seem to have been around

China Is All In on a RISC-V Future

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank.

CES Is Back and AI Will Take Center Stage. Here’s What Else to Expect From Tech’s Biggest Show.

This coming week, a ridiculous number of people will be in Las Vegas for the annual extravaganza that is CES. First held

Linux 6.7 release – Main changes, Arm, RISC-V, and MIPS architectures

So we had a little bit more going on last week compared to the holiday week before that, but certainly not enough

CEO interview: MIPS’ Sameer Wasson on a RISC-V reboot

MIPS Inc. is emerging as a significant RISC-V processor core licensor under its recently-appointed CEO Sameer Wasson. eeNews Europe interviewed Wasson to

MIPS recruits former senior SiFive execs to boost RISC-V play

MIPS Inc. (San Jose, Calif.) has recruited Drew Barbier and Brad Burgess to its leadership team, both formerly with RISC-V pioneer SiFive

Chip company MIPS poaches two SiFive execs for leadership team

Two former SiFive executives have joined the executive leadership team of semiconductor design company MIPS. MIPS, a company focused on the development

MIPS snags top SiFive brains to amp up RISC-V business

Chip designer MIPS has picked up two former execs from SiFive in a bid to boost its RISC-V development efforts. MIPS, the

MIPS Welcomes New Executives as Part of Company’s Growth and Expansion

MIPS, a leading developer of high- performance RISC-V compute IP, today announced the addition of two semiconductor industry veterans to its leadership

MIPS Inc. Boosts Leadership Team, Eyes RISC-V Market Expansion

In a strategic move poised to invigorate the RISC architecture processors domain, MIPS Inc., a groundbreaking company in the sector, has announced

Sameer Wasson’s Vision for MIPS/RISC-V

MIPS, a storied CPU IP core company with a tortuous business/management history, is writing a new chapter under the watch of new

Unlocking the Power of Edge AI Through Efficient Data Movement

By Dave Bell, Senior Director of Product Management, MIPS In today’s interconnected world, the advancement of Edge AI has revolutionized the way

MIPS Launches New Strategic Focus and ReBrand: The Freedom to Innovate Compute

By Sameer Wasson, CEO Today is an exciting day at MIPS as we launch a rebrand and strategic focus on giving our

Download MIPS Press Kit Materials

Scroll to Top