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MIPS I8500 Processor Orchestrates Data Movement for the AI Era

MIPS I8500 delivers deterministic, secure data orchestration for Physical AI with 3rd generation four-thread-per-core processor built using open RISC-V ISA SAN JOSE, Calif.,...

MIPS Appoints Moshe Hillel to Accelerate Growth in Israel

MIPS business development in Israel will drive Automotive, Industrial, Data Center Infrastructure, and Communications Infrastructure market growth, fueled by the open and modular...

MIPS Appoints Alan Li as Head of Business Development to Accelerate China Growth

MIPS China business development team has strong focus on Automotive, Industrial, and Communications Infrastructure market growth, leveraging the industry-leading MIPS Atlas Portfolio of...

MIPS Appoints Michael Zirngibl as Vice President of Business Development to Accelerate EMEA Growth

Expansion of EMEA operations signals strong focus on Automotive, Industrial, and Communications Infrastructure market growth, leveraging the industry-leading MIPS Atlas Portfolio of RISC-V...

GlobalFoundries Completes Acquisition of MIPS

Transaction expands IP offerings, strengthens portfolio differentiation and brings in engineering talent to accelerate AI and compute innovation MALTA, N.Y., August 14, 2025...

GlobalFoundries to Acquire MIPS to Accelerate AI and Compute Capabilities

Acquisition will expand GF portfolio with cutting-edge RISC-V processor IP and software tools for real-time computing in autonomous mobility, industrial automation, datacenter and...

MIPS and Cyient Semiconductor collaborate to bring Custom RISC-V-based intelligent power solutions to AI Power Delivery, Industrial Robotics, and Automotive

San Jose, CA & Hyderabad, India- June 12, 2025: Cyient Semiconductors Private Limited, a fast-growing custom silicon company based in Hyderabad, and MIPS,...

MIPS Drives Real-Time Intelligence into Physical AI Platforms

The new MIPS Atlas product suite delivers cutting-edge compute subsystems that empower autonomous edge solutions to sense, think and act with precision, driving...

MIPS Releases P8700, Industry’s First High-Performance AI-Enabled RISC-V Automotive CPU for ADAS and Autonomous Vehicles

MIPS, a leading developer of efficient and configurable IP compute cores, will showcase the company’s latest innovations and suite of system deployments at...

MIPS To Showcase New Embedded and Edge AI Innovations At Computex 2024

MIPS, a leading developer of efficient and configurable IP compute cores, will showcase the company’s latest innovations and suite of system deployments at...

MIPS Continues To Expand With The Addition Of Industry Leaders from NVIDIA, Google and SiFive

Executives’ Technical Prowess Will Help Drive Innovation and Accelerate Product Development to Meet Customer Demand for AI Compute and RISC-V SAN JOSE, CA...

MIPS Expands RISC-V Ecosystem Support to Enable Early Software Development for Multi-threaded Cores

Live Demonstration of Synopsys ImperasFPM Models for MIPS Processors at Embedded World 2024 Showcases Collaboration for RISC-V-Based Designs SAN JOSE, CA – April...

MIPS at 40

MIPS is celebrating its 40th anniversary as a compute IP company this year. Known for a RISC instruction set, the company has risen...

Not All RISC-V IP is the Same

MIPS CEO Sameer Wasson discusses the company’s approach to RISC-V and how its P8700 RISC-V cores stack up against the competition....

Multicore RISC-V Designs for Smart Automotive Apps

A cluster of six MIPS P8700 RISC-V cores can be replicated up to 64 times to support 768 execution threads....

AI-Enabled RISC-V Cores Target ASIL B Automotive Apps

The MIPS P8700 RISC-V core, which implements a RISC-V ISA, aims at ASIL B and ISO 26262 functional safety....

MIPS releases RISC-V CPU for autonomous vehicles

MIPS released its P8700 CPU based on the RISC-V computing architecture to target driver assistance and autonomous vehicle applications....

Addressing AI While Keeping the MIPSiness In MIPS

MIPS, now targeting AI applications for its application-specific data movement cores, is evolving with a careful eye on its strengths....

Sameer Wasson: Have a Steady Hand, Don’t be Distracted

In this episode of Silicon Grapevine, we talk to MIPS CEO Sameer Wasson about the experience of going from an intern doing FPGA...

The New MIPS – Solving Compute Where It Happens

Timing, opportunity and geographic location matter in life – when we decide to do important things and where we decide to live and...

Embedded Quest at Embedded World

In our quest for "useful" embedded systems, the Ojo-Yoshida Report roamed the show floor at Embedded World, cornering vendors and asking two questions:...

MIPS Adds 3 Managers from NVIDIA, Google and SiFive

MIPS, a developer of efficient and configurable IP compute cores, today announced the addition of three technology and semiconductor industry professionals dedicated to...

MIPS Expands RISC-V Ecosystem Support to to Enable Early Software Development for Multi-threaded Cores

MIPS, a leading developer of efficient and configurable IP compute cores, today announced that it has expanded its collaboration with Synopsys, Inc. to...

MIPS RISC-V ecosystem supports early software development

MIPS has announced that it has expanded its collaboration with Synopsys to accelerate ecosystem enablement of MIPS RISC-V IP and their customer’s ability...

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