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MIPS Launches Workload-Native Platforms for Physical AI

Inference-Native: MIPS Acies™ is an AI inference developer platform for modern edge workloads, with an open, standards-based NPU, an open software stack, and...

MIPS Leads Open Standards Development for Physical AI Platforms as RISC-V International Premier Member

MIPS combines foundry scale, processor IP, software-first design tools, and open standards leadership to help customers build workload-optimized computing platforms for AI...

GlobalFoundries completes acquisition of Synopsys’ Processor IP Solutions Business, delivering a holistic technology platform for Physical AI

Combines GF’s Physical AI portfolio with MIPS’ RISC-V and software-to-silicon expertise to accelerate custom, software-first products for automotive, industrial and agentic edge platforms...

MIPS and INOVA Collaborate to put Physical AI into the palm of Robotic hands with new Reference Platform

Inova Semiconductors collaborate with MIPS to build reference Physical AI platform for secure architectures in Robotics applications New platform will be a hardware-based...

MIPS and Green Hills Software Accelerate Safety Certified Product Development for MIPS RISC-V Microcontrollers

Collaboration accelerates time-to-market for mission-critical applications in automotive and industrial markets Designed for real-time, event-driven Physical AI action platforms that need safety certification...

GlobalFoundries to Acquire Synopsys’ Processor IP Solutions Business, Expanding Capabilities to Accelerate Physical AI Applications

Acquisition will strengthen GF’s leadership in Physical AI, enhances compute capabilities, expands company’s RISC-V and AI portfolio and software tools and accelerates custom...

MIPS S8200 Delivers Software-First RISC-V NPU To Enable Physical AI at the Autonomous Edge

MIPS S8200 NPU is sampling now to lead customers developing autonomous edge transportation, robotics, and embedded platforms ForwardEdge ASIC selects MIPS S8200 NPU...

Siemens and GlobalFoundries collaborate to deploy AI-driven manufacturing to strengthen global semiconductor supply

Strategic collaboration to enhance performance of semiconductors and other advanced industries based on both companies’ AI-based capabilities Centralized AI-enabled automation, predictive maintenance, advanced...

Quintauris Announces Strategic Collaboration with MIPS to enable MIPS Atlas as part of RT-Europa

Quintauris, a leading provider of RISC-V solutions, and MIPS, a GlobalFoundries company and leading provider of RISC-V IP and software for physical AI...

MIPS I8500 Processor Orchestrates Data Movement for the AI Era

MIPS I8500 delivers deterministic, secure data orchestration for Physical AI with 3rd generation four-thread-per-core processor built using open RISC-V ISA SAN JOSE, Calif.,...

MIPS Appoints Moshe Hillel to Accelerate Growth in Israel

MIPS business development in Israel will drive Automotive, Industrial, Data Center Infrastructure, and Communications Infrastructure market growth, fueled by the open and modular...

MIPS Appoints Alan Li as Head of Business Development to Accelerate China Growth

MIPS China business development team has strong focus on Automotive, Industrial, and Communications Infrastructure market growth, leveraging the industry-leading MIPS Atlas Portfolio of...

MIPS at 40

MIPS is celebrating its 40th anniversary as a compute IP company this year. Known for a RISC instruction set, the company has risen...

Not All RISC-V IP is the Same

MIPS CEO Sameer Wasson discusses the company’s approach to RISC-V and how its P8700 RISC-V cores stack up against the competition....

Multicore RISC-V Designs for Smart Automotive Apps

A cluster of six MIPS P8700 RISC-V cores can be replicated up to 64 times to support 768 execution threads....

AI-Enabled RISC-V Cores Target ASIL B Automotive Apps

The MIPS P8700 RISC-V core, which implements a RISC-V ISA, aims at ASIL B and ISO 26262 functional safety....

MIPS releases RISC-V CPU for autonomous vehicles

MIPS released its P8700 CPU based on the RISC-V computing architecture to target driver assistance and autonomous vehicle applications....

Addressing AI While Keeping the MIPSiness In MIPS

MIPS, now targeting AI applications for its application-specific data movement cores, is evolving with a careful eye on its strengths....

Sameer Wasson: Have a Steady Hand, Don’t be Distracted

In this episode of Silicon Grapevine, we talk to MIPS CEO Sameer Wasson about the experience of going from an intern doing FPGA...

The New MIPS – Solving Compute Where It Happens

Timing, opportunity and geographic location matter in life – when we decide to do important things and where we decide to live and...

Embedded Quest at Embedded World

In our quest for "useful" embedded systems, the Ojo-Yoshida Report roamed the show floor at Embedded World, cornering vendors and asking two questions:...

MIPS Adds 3 Managers from NVIDIA, Google and SiFive

MIPS, a developer of efficient and configurable IP compute cores, today announced the addition of three technology and semiconductor industry professionals dedicated to...

MIPS Expands RISC-V Ecosystem Support to to Enable Early Software Development for Multi-threaded Cores

MIPS, a leading developer of efficient and configurable IP compute cores, today announced that it has expanded its collaboration with Synopsys, Inc. to...

MIPS RISC-V ecosystem supports early software development

MIPS has announced that it has expanded its collaboration with Synopsys to accelerate ecosystem enablement of MIPS RISC-V IP and their customer’s ability...

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