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MIPS To Showcase New Embedded and Edge AI Innovations At Computex 2024

MIPS, a leading developer of efficient and configurable IP compute cores, will showcase the company’s latest innovations and suite of system deployments

MIPS Continues To Expand With The Addition Of Industry Leaders from NVIDIA, Google and SiFive

Executives’ Technical Prowess Will Help Drive Innovation and Accelerate Product Development to Meet Customer Demand for AI Compute and RISC-V SAN JOSE,

MIPS Expands RISC-V Ecosystem Support to Enable Early Software Development for Multi-threaded Cores

Live Demonstration of Synopsys ImperasFPM Models for MIPS Processors at Embedded World 2024 Showcases Collaboration for RISC-V-Based Designs SAN JOSE, CA –

MIPS Expands Global Footprint with New Design Center and Talent for Systems Architects and AI Compute

MIPS, a leading developer of efficient and configurable compute cores, today announced the company’s global expansion with the launch of a new

MIPS Launches New Corporate Brand At CES 2024

Rebrand Reflects the Company’s Strategic Focus on Giving Customers the Freedom to Innovate Compute in the Automotive, Data Center and Embedded Markets.

MIPS: Freedom to Innovate Compute

Watch the Video: At MIPS, we are giving our customers the freedom to innovate compute in the automotive, data center and embedded

MIPS Welcomes New Executives as Part of Company’s Growth and Expansion

Former SiFive Leaders to Help Drive IP Innovation and Market Penetration SAN JOSE, CA – January 03, 2024 – MIPS, a leading

MIPS Takes Top Honors at Embedded World for eVocore P8700 Multiprocessor

Company’s First RISC-V Product Paves Way for Future of Chip Development   SAN JOSE, Calif., March 16, 2023 /PRNewswire/ — MIPS, a

MIPS Leverages Siemens’ Veloce proFPGA platform to Implement and Make Available Capabilities of its New High-Performance eVocore P8700 RISC-V Multiprocessor

New Platform to Accelerate Time-to-Market and Reduce Costs & Bottlenecks for SoC Developers   SAN JOSE, Calif., May 30, 2023 /PRNewswire/ —

Imperas Collaborates with MIPS and Ashling to Accelerate RISC-V Application Software Development from SoC Concept to Deployment

Oxford, United Kingdom – March 13th, 2023 – Imperas Software Ltd., the leader in RISC-V models and simulation solutions, today announced with

MIPS Named Embedded Award Nominee for eVocore P8700 Multiprocessor

Prestigious Global Industry Accolades Honor Top Embedded Systems Innovations SAN JOSE, Calif., Feb. 28, 2023 — MIPS, a leading developer of highly

MIPS Announces Availability of its first RISC-V IP core – the eVocore P8700 Multiprocessor

Industry’s Highest Performance, Most Scalable RISC-V IP Core Already Adopted for Next-Generation Automotive Applications San Jose, Calif., Dec. 12, 2022 — As

MIPS Welcomes New Executives as Part of Company’s Growth and Expansion

MIPS, a leading developer of high- performance RISC-V compute IP, today announced the addition of two semiconductor industry veterans to its leadership

MIPS Inc. Boosts Leadership Team, Eyes RISC-V Market Expansion

In a strategic move poised to invigorate the RISC architecture processors domain, MIPS Inc., a groundbreaking company in the sector, has announced

Sameer Wasson’s Vision for MIPS/RISC-V

MIPS, a storied CPU IP core company with a tortuous business/management history, is writing a new chapter under the watch of new

China Deploys Massive RISC-V Server in Commercial Cloud

If the U.S. government intends to curb China’s adoption of emerging RISC-V architecture to develop homegrown chips, it may be getting late.

Embedded Computing Design: MIPS Plans Expansion, Pulls New CEO from TI

The recent growth in RISC-V interest and adoption is hard to deny, and MIPS, a developer of high-performance RISC-V compute IP, is

MIPS taps Siemens FPGA for RISC-V CPU roll out

MIPS is using an FPGA platform from Siemens Digital Industries Software to accelerate software development for its eVocore P8700 RISC-V multiprocessor.

Electronic Engineering: MIPS Rolls Out Its First RISC-V Processor Core

Even though the company had telegraphed its big move, MIPS’s adoption of the RISC-V ISA for its future processor cores hit me

EE Times: RISC-V Summit 2022: All Your CPUs Belong to Us

MIPS announced that Mobileye adopted its eVocore P8700 for the next-generation EyeQ SoC for autonomous driving and advanced driver assistance systems (ADAS).

All About Circuits: “RISC-V is Inevitable”—A Tale of Two RISC-V Summit Keynotes

RISC-V is everywhere. RISC-V is redefining computing. And that’s not just for this quarter. This is for the next era of computing.

New Electronics: MIPS makes first RISC-V IP core available

MIPS, a developer of scalable RISC processor IP, has announced the availability of the eVocore P8700, said to be the industry’s highest

EE World Online: Scalable RISC-V multiprocessor IP promotes efficient SoC uses

MIPS has announced the availability of the eVocore P8700, the industry’s highest-performance, most scalable RISC-V multiprocessor IP. The P8700 has already been

Forbes: MIPS Joins The RISC-V Gang

Perhaps the biggest news at the RISC-V Summit came from MIPS. The story of MIPS is as full of twists, turns, and

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