MIPS ARC VPX2, VPX3, VPX5 and VPX6 DSP Processors

MIPS ARC® VPX DSP IP is a family of VLIW/SIMD processors targeting a broad range of signal processing applications, from always-on devices to automotive ADAS to communications and high-performance computing.

The VPX Family supports multiple vector lengths and core configurations:

  • 128-bit vector word – VPX2 (single core), VPX2x2 (dual core)
  • 256-bit vector word – VPX3 (single core), VPX3x2 (dual core)
  • 512-bit vector word – VPX5 (single core), VPX5x2 (dual core), VPX5x4 (quad core)
  • 1024-bit vector word – VPX6 (single core), VPX6x2 (dual core), VPX6x4 (quad core)

VPX DSP processors feature a 4-way VLIW architecture optimally balanced to achieve high performance with low power consumption. Each VPX DSP core integrates a high-performance 32-bit scalar pipeline and a multi-slot vector processing unit supporting 8-bit, 16-bit, and 32-bit SIMD computations. Each VPX DSP core is capable of executing one scalar and three vector instructions per cycle. The VPX DSPs are supported by configurable instruction and data caches for scalar operations and vector closely-coupled memory (VCCM) with single cycle access for vector processing. Like all ARC processors, the VPX DSPs are highly scalable and configurable, enabling users to tailor them to meet specific performance-power-area (PPA) requirements.

Each VPX DSP core has up to three parallel floating-point processing pipelines, including two optional IEEE-754 compliant vector floating point units that support both full- (32-bit) and half- (16-bit) precision floating point operations. The VPX cores also have the option to add a dedicated vector floating point pipe that accelerates an extensive set of math functions including div, √x, 1/√x, sin(x), cos(x), log2(x), 2x, and ex.

To speed application software development, the VPX Family is supported by MIPS’ ARC MetaWare tools, which provide a comprehensive and vector-length agnostic software programming environment that enables code portability among all members of the VPX family. The tool suite includes an optimizing C/C++ vector compiler, debugger, instruction set simulator, as well as vector-based DSP, machine learning inference, linear algebra and vision processing libraries.

MIPS ARC VPX DSP Processor Block Diagram

Highlights

  • Four-way VLIW combining scalar and vector operations
  • 128-bit, 256-bit, 512-bit and 1024-bit vector word lengths
  • 8, 16, and 32-bit integer SIMD engines
  • IEEE 754-compliant vector floating point unit option offers single-precision or half-precision operations and advanced math functions
    • Dual vector floating point SIMD pipes
    • Hardware acceleration for math functions
    • Hardware acceleration for FFT functions
  • Single- and multicore-configured offerings
  • ARC MetaWare tools including an auto vectorizing C/C++ compiler, debugger, simulator, vector DSP, vector linear algebra libraries, vision processing and neural network SDK

Licensable Options

Product Details

Product Details

1024-bit Vector DSP IP, Quad Core STARs Subscribe
128-bit Vector DSP IP, Dual Core STARs Subscribe
128-bit Vector DSP IP, Dual Core with Functional Safety STARs Subscribe
128-bit Vector DSP IP, Single Core STARs Subscribe
128-bit Vector DSP IP, Single Core with Functional Safety STARs Subscribe
256-bit Vector DSP IP, Dual Core STARs Subscribe
256-bit Vector DSP IP, Dual Core with Functional Safety STARs Subscribe
256-bit Vector DSP IP, Single Core STARs Subscribe
256-bit Vector DSP IP, Single Core with Functional Safety STARs Subscribe
512-bit Vector DSP IP, Dual Core STARs Subscribe
512-bit Vector DSP IP, Quad Core STARs Subscribe
512-bit Vector DSP IP, Single Core STARs Subscribe
AI data compression option on VPX cores STARs Subscribe
Description 1024-bit Vector DSP IP, Quad Core
Name dwc_arc_vpx6x4_dsp
Version 3.00a-lca01
ECCN 3E991/NLR
STARs Open and/or Closed STARs
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Product Code J707-0
Description 128-bit Vector DSP IP, Dual Core
Name dwc_arc_vpx2x2_dsp
Version 2.00a
ECCN 3E991/NLR
STARs Open and/or Closed STARs
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
DesignWare® ARC® Trace Databook ( PDF )
DesignWare® ARC® VPXx APEX Databook ( PDF )
DesignWare® ARC® VPXx DSP Series Databook 2.00a ( PDF )
HAPS Reference Design Flow Databook (ARC VPXx 2.00a) ( PDF )
MIPS® Processor IP ARC® Trace Databook (Beta) ( PDF )
MIPS® Processor IP ARC® VPXx DSP Series Databook (Beta) ( PDF )
DesignWare ARC VPXx Implementation and Integration Guide 2.00a ( PDF )
MIPS® Processor IP ARC® VPXx Implementation and Integration Guide (Beta) ( PDF )
DesignWare® ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (2.00a) ( PDF | HTML )
MIPS® Processor IP ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (Beta) ( PDF )
DesignWare® ARC® MIPS ASIC Reference Design Flow User’s Guide (2.00a) ( PDF )
Optimizing Logic BIST Applied As Safety Mechanism In Automotive Vector DSP ( PDF )
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Product Code F940-0
Description 128-bit Vector DSP IP, Dual Core with Functional Safety
Name dwc_arc_vpx2x2fs_dsp
ECCN 3E991/NLR
STARs Open and/or Closed STARs
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
Optimizing Logic BIST Applied As Safety Mechanism In Automotive Vector DSP ( PDF )
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Description 128-bit Vector DSP IP, Single Core
Name dwc_arc_vpx2_dsp
Version 2.00a
ECCN 3E991/NLR
STARs Open and/or Closed STARs
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
DesignWare® ARC® Trace Databook ( PDF )
DesignWare® ARC® VPXx APEX Databook ( PDF )
DesignWare® ARC® VPXx DSP Series Databook 2.00a ( PDF )
HAPS Reference Design Flow Databook (ARC VPXx 2.00a) ( PDF )
MIPS® Processor IP ARC® Trace Databook (Beta) ( PDF )
MIPS® Processor IP ARC® VPXx DSP Series Databook (Beta) ( PDF )
DesignWare ARC VPXx Implementation and Integration Guide 2.00a ( PDF )
MIPS® Processor IP ARC® VPXx Implementation and Integration Guide (Beta) ( PDF )
DesignWare® ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (2.00a) ( PDF | HTML )
MIPS® Processor IP ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (Beta) ( PDF )
DesignWare® ARC® MIPS ASIC Reference Design Flow User’s Guide (2.00a) ( PDF )
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Product Code F939-0
Description 128-bit Vector DSP IP, Single Core with Functional Safety
Name dwc_arc_vpx2fs_dsp
Version 2.00a-lca01
ECCN 3E991/NLR
STARs Open and/or Closed STARs
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Product Type DesignWare Cores
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
DesignWare ARC Trace Databook 2.00a-lca01 ( PDF )
DesignWare® ARC VPXxFS DSP Series Databook (VPX2FS) ( PDF )
HAPS Reference Design Flow Databook 2.00a-lca01 ( PDF )
DesignWare ARCv2 ISA Programmer’s Reference for ARC VPXxFS Processors 2.00a-lca01 ( PDF )
DesignWare ARC VPXxFS Implementation and Integration Guide 2.00a-lca01 ( PDF )
DesignWare® ARC® MIPS ASIC Reference Design Flow User’s Guide 2.00a-lca01 ( PDF )
Optimizing Logic BIST Applied As Safety Mechanism In Automotive Vector DSP ( PDF )
Toolsets Qualified Toolsets
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Product Code F941-0
Description 256-bit Vector DSP IP, Dual Core
Name dwc_arc_vpx3x2_dsp
Version 2.00a
ECCN 3E991/NLR
STARs Open and/or Closed STARs
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
DesignWare® ARC® Trace Databook ( PDF )
DesignWare® ARC® VPXx APEX Databook ( PDF )
DesignWare® ARC® VPXx DSP Series Databook 2.00a ( PDF )
HAPS Reference Design Flow Databook (ARC VPXx 2.00a) ( PDF )
MIPS® Processor IP ARC® Trace Databook (Beta) ( PDF )
MIPS® Processor IP ARC® VPXx DSP Series Databook (Beta) ( PDF )
DesignWare ARC VPXx Implementation and Integration Guide 2.00a ( PDF )
MIPS® Processor IP ARC® VPXx Implementation and Integration Guide (Beta) ( PDF )
DesignWare® ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (2.00a) ( PDF | HTML )
MIPS® Processor IP ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (Beta) ( PDF )
DesignWare® ARC® MIPS ASIC Reference Design Flow User’s Guide (2.00a) ( PDF )
Optimizing Logic BIST Applied As Safety Mechanism In Automotive Vector DSP ( PDF )
Toolsets Qualified Toolsets
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Product Code F936-0
Description 256-bit Vector DSP IP, Dual Core with Functional Safety
Name dwc_arc_vpx3x2fs_dsp
ECCN 3E991/NLR
STARs Open and/or Closed STARs
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
Optimizing Logic BIST Applied As Safety Mechanism In Automotive Vector DSP ( PDF )
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Description 256-bit Vector DSP IP, Single Core
Name dwc_arc_vpx3_dsp
Version 2.00a
ECCN 3E991/NLR
STARs Open and/or Closed STARs
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Product Type DesignWare Cores
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
DesignWare® ARC® Trace Databook ( PDF )
DesignWare® ARC® VPXx APEX Databook ( PDF )
DesignWare® ARC® VPXx DSP Series Databook 2.00a ( PDF )
HAPS Reference Design Flow Databook (ARC VPXx 2.00a) ( PDF )
MIPS® Processor IP ARC® Trace Databook (Beta) ( PDF )
MIPS® Processor IP ARC® VPXx DSP Series Databook (Beta) ( PDF )
DesignWare ARC VPXx Implementation and Integration Guide 2.00a ( PDF )
MIPS® Processor IP ARC® VPXx Implementation and Integration Guide (Beta) ( PDF )
DesignWare® ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (2.00a) ( PDF | HTML )
MIPS® Processor IP ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (Beta) ( PDF )
DesignWare® ARC® MIPS ASIC Reference Design Flow User’s Guide (2.00a) ( PDF )
Optimizing Logic BIST Applied As Safety Mechanism In Automotive Vector DSP ( PDF )
Toolsets Qualified Toolsets
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Product Code F935-0
Description 256-bit Vector DSP IP, Single Core with Functional Safety
Name dwc_arc_vpx3fs_dsp
Version 2.00a-lca02
ECCN 3E991/NLR
STARs Open and/or Closed STARs
myDesignWare Subscribe for Notifications
Product Type DesignWare Cores
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
DesignWare ARC Trace Databook 2.00a-lca01 ( PDF )
DesignWare® ARC VPXxFS DSP Series Databook (VPX3FS) ( PDF )
HAPS Reference Design Flow Databook 2.00a-lca01 ( PDF )
DesignWare ARCv2 ISA Programmer’s Reference for ARC VPXxFS Processors 2.00a-lca01 ( PDF )
DesignWare ARC VPXxFS Implementation and Integration Guide 2.00a-lca01 ( PDF )
DesignWare® ARC® MIPS ASIC Reference Design Flow User’s Guide 2.00a-lca01 ( PDF )
Optimizing Logic BIST Applied As Safety Mechanism In Automotive Vector DSP ( PDF )
Toolsets Qualified Toolsets
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Product Code F937-0
Description 512-bit Vector DSP IP, Dual Core
Name dwc_arc_vpx5x2_dsp
Version 2.00a
ECCN 3E991/NLR
STARs Open and/or Closed STARs
myDesignWare Subscribe for Notifications
Product Type DesignWare Cores
Documentation
Show Documents
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
DesignWare® ARC® Trace Databook ( PDF )
DesignWare® ARC® VPXx APEX Databook ( PDF )
DesignWare® ARC® VPXx DSP Series Databook 2.00a ( PDF )
HAPS Reference Design Flow Databook (ARC VPXx 2.00a) ( PDF )
MIPS® Processor IP ARC® Trace Databook (Beta) ( PDF )
MIPS® Processor IP ARC® VPXx DSP Series Databook (Beta) ( PDF )
DesignWare ARC VPXx Implementation and Integration Guide 2.00a ( PDF )
MIPS® Processor IP ARC® VPXx Implementation and Integration Guide (Beta) ( PDF )
DesignWare® ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (2.00a) ( PDF | HTML )
MIPS® Processor IP ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (Beta) ( PDF )
DesignWare® ARC® MIPS ASIC Reference Design Flow User’s Guide (2.00a) ( PDF )
Optimizing Logic BIST Applied As Safety Mechanism In Automotive Vector DSP ( PDF )
Toolsets Qualified Toolsets
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Product Code F931-0
Description 512-bit Vector DSP IP, Quad Core
Name dwc_arc_vpx5x4_dsp
Version 2.00a
ECCN 3E991/NLR
STARs Open and/or Closed STARs
myDesignWare Subscribe for Notifications
Product Type DesignWare Cores
Documentation
Show Documents
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
DesignWare® ARC® Trace Databook ( PDF )
DesignWare® ARC® VPXx APEX Databook ( PDF )
DesignWare® ARC® VPXx DSP Series Databook 2.00a ( PDF )
HAPS Reference Design Flow Databook (ARC VPXx 2.00a) ( PDF )
MIPS® Processor IP ARC® Trace Databook (Beta) ( PDF )
MIPS® Processor IP ARC® VPXx DSP Series Databook (Beta) ( PDF )
DesignWare ARC VPXx Implementation and Integration Guide 2.00a ( PDF )
MIPS® Processor IP ARC® VPXx Implementation and Integration Guide (Beta) ( PDF )
DesignWare® ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (2.00a) ( PDF | HTML )
MIPS® Processor IP ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (Beta) ( PDF )
DesignWare® ARC® MIPS ASIC Reference Design Flow User’s Guide (2.00a) ( PDF )
Optimizing Logic BIST Applied As Safety Mechanism In Automotive Vector DSP ( PDF )
Toolsets Qualified Toolsets
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Product Code F932-0
Description 512-bit Vector DSP IP, Single Core
Name dwc_arc_vpx5_dsp
Version 2.00a
ECCN 3E991/NLR
STARs Open and/or Closed STARs
myDesignWare Subscribe for Notifications
Product Type DesignWare Cores
Documentation
Show Documents
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DSP Library Performance Databook for ARC VPX (latest) ( PDF )
DesignWare® ARC® Trace Databook ( PDF )
DesignWare® ARC® VPXx APEX Databook ( PDF )
DesignWare® ARC® VPXx DSP Series Databook 2.00a ( PDF )
HAPS Reference Design Flow Databook (ARC VPXx 2.00a) ( PDF )
MIPS® Processor IP ARC® Trace Databook (Beta) ( PDF )
MIPS® Processor IP ARC® VPXx DSP Series Databook (Beta) ( PDF )
DesignWare ARC VPXx Implementation and Integration Guide 2.00a ( PDF )
MIPS® Processor IP ARC® VPXx Implementation and Integration Guide (Beta) ( PDF )
DesignWare® ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (2.00a) ( PDF | HTML )
MIPS® Processor IP ARCv2 ISA Programmer’s Reference Manual for ARC® VPXx Processors (Beta) ( PDF )
DesignWare® ARC® MIPS ASIC Reference Design Flow User’s Guide (2.00a) ( PDF )
Optimizing Logic BIST Applied As Safety Mechanism In Automotive Vector DSP ( PDF )
Toolsets Qualified Toolsets
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Product Code E831-0
Description AI data compression option on VPX cores
Name dwc_arc_vpx_ai_data_compression_option
ECCN 3E991/NLR
STARs Open and/or Closed STARs
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Product Code J194-0

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