MIPS Announces Availability of its first RISC-V IP core – the eVocore P8700 Multiprocessor
- December 12, 2022
Industry’s Highest Performance, Most Scalable RISC-V IP Core Already Adopted for Next-Generation Automotive Applications San Jose, Calif., Dec. 12, 2022 — As the...
MIPS Partners With Mobileye to Accelerate Next Generation Autonomous Driving Technologies and Advanced Driver Assistance Systems
- December 12, 2022
Mobileye Adopts New MIPS eVocore RISC-V CPUs; RISC-V Architecture to Help Drive Future of Vehicle Safety San Jose, Calif., December 12, 2022- MIPS,...
MIPS Selects Imperas for Advanced Verification of High-Performance RISC-V Application-class Processors
- December 7, 2022
Building on 35 years of innovation in RISC processor development, MIPS’ strategic move to RISC-V is supported by Imperas RISC-V Reference Models, Verification...
We’re Getting Ready to Launch Something Big at RISC-V Summit 2022!
- December 6, 2022
RISC-V Summit has always been the ideal venue to unveil new innovations that drive higher performance and greater scalability for today’s complex applications....
Intel Taps MIPS eVocore for Intel Pathfinder for RISC-V
- August 30, 2022
Architecture Will Accelerate Innovation in Open Computing SAN JOSE, Calif., Aug. 30, 2022 /PRNewswire/ — MIPS, a leading developer of highly scalable RISC...
MIPS is thrilled to be part of Imperas’ Open Standard RISC-V Verification Interface (RVVI)
- July 13, 2022
July 11th, 2022 – Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced the latest updates for RVVI (RISC-V Verification Interface)...
MIPS Pivots to RISC-V with Best-In-Class Performance and Scalability
- May 26, 2022
Previews the first IP solutions in the eVocore™ product lineup: P8700 and I8500 multiprocessors SAN JOSE, Calif. – May 10, 2022 – MIPS,...
MIPS chooses Ashling’s RiscFree™ Toolchain for its RISC-V ISA compatible IP cores
- March 28, 2022
SILICON VALLEY, CA, USA – March 28, 2022. Ashling and MIPS announced today that Ashling’s RiscFree™ Toolchain has been extended to support MIPS...
MIPS selects Imperas Reference Models for RISC-V Processor Verification
- November 29, 2021
Oxford, United Kingdom – November 29th, 2021 – Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced with MIPS, Inc., the...
Restructured Wave Computing/MIPS Business Moves ahead as MIPS
- March 1, 2021
SANTA CLARA, Calif., March 1, 2021 /PRNewswire/ — Wave Computing, Inc. (“Wave”) and its subsidiaries including MIPS Tech, the processor technology company focused...
Not All RISC-V IP is the Same
- January 7, 2025
Multicore RISC-V Designs for Smart Automotive Apps
- January 7, 2025
AI-Enabled RISC-V Cores Target ASIL B Automotive Apps
- November 7, 2024
MIPS releases RISC-V CPU for autonomous vehicles
- November 7, 2024
Addressing AI While Keeping the MIPSiness In MIPS
- July 8, 2024
Sameer Wasson: Have a Steady Hand, Don’t be Distracted
- June 27, 2024
The New MIPS – Solving Compute Where It Happens
- June 6, 2024
Embedded Quest at Embedded World
- April 18, 2024
MIPS Adds 3 Managers from NVIDIA, Google and SiFive
- April 9, 2024
MIPS Expands RISC-V Ecosystem Support to to Enable Early Software Development for Multi-threaded Cores
- April 8, 2024
MIPS, a leading developer of efficient and configurable IP compute cores, today announced that it has expanded its collaboration with Synopsys, Inc. to...
MIPS RISC-V ecosystem supports early software development
- April 8, 2024
MIPS has announced that it has expanded its collaboration with Synopsys to accelerate ecosystem enablement of MIPS RISC-V IP and their customer’s ability...
Chip Industry Week In Review
- April 5, 2024