The ARC® IoT Development Kit is a versatile platform that includes the necessary hardware and software to accelerate software development and debugging of sensor fusion, voice recognition and face detection designs.

OpenVX from Khronos Group is an open standard for cross platform acceleration of computer vision applications, including the ARC Embedded Vision processor.

Hardware extensions and an accompanying set of software wrapper functions that provide a collection of additional instructions supporting a range of mathematical functions that can be used with all ARC HS processors.

The MIPS ARC® HS56, HS57D and HS58 processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications where performance and high clock speed are required.

MIPS ARC® HS66 and HS68 Processor IP feature a dual-issue, 64-bit superscalar architecture for use in embedded applications where high-performance and high clock speed are required.

MIPS ARC® HS34, HS36 and HS38 Procsesor IP are based on the highly-efficient ARCv2 instruction set architecture (ISA) and pipeline that deliver a high degree of performance efficiency and code density with minimal power and area for embedded applications.

The ARC HS4x processors feature a dual-issue, 32-bit superscalar architecture for use in embedded applications where high-performance and high clock speed are required.

MIPS ARC® Audio MPEG-4 aacPlus v2 Encoder provides high-quality audio encoding for devices such as television sets, set-top boxes and digital cameras

The ARC OPUS codec is designed for interactive speech and audio transmission over the internet.

The Enhanced Voice Services (EVS) codec for MIPS ARC® Processors is a super-wideband speech audio coding standard.