Overview
The MIPS ARC® FastMath Pack for ARC HS processors is a set of hardware extensions and an accompanying set of software wrapper functions that provide a collection of additional instructions supporting a range of mathematical functions that can be used with all ARC HS processors. These include
- Basic saturating arithmetic
- Trigonometric functions
- Logarithmic and exponential functions
- Fractional division and square root functions
The instructions support 16-bit and 32-bit data types. In addition to the extension instructions, the FastMath Pack includes a number of extension auxiliary registers.
All FastMath instructions are encoded in 32-bit formats and observe all of the established rules for encoding ARCv2 instructions for use with ARC HS processors. The instructions are implemented in the APEX extension space using the major opcode 0x07. In addition, all FastMath instructions and register names have the prefix “FMP_” to ensure they do not create any namespace clashes with existing ARCv2 instructions or other customer-defined instructions.
The FastMath instructions significantly reduce cycle count compared to the same functions implemented in software. They are easy to use and implemented as standard C-functions in application code.
Highlights & Key Features
- Mathematical functions for ARC
- HS processors
- Basic saturating arithmetic
- Trigonometric functions
- Logarithmic functions
- Exponential functions
- Square root functions
- Fractional division
- Support for 16-bit and 32-bit data types
- Significantly reduce cycle count
- and increase performance
- Implemented as standard
- C-functions in application code
Product Details
Products
Downloads & Documentation
| Description | The FastMath Pack is a math processing accelerator for the ARC HS family |
| Name | dwc_arc_fastmath_pack_for_hs |
| Version | 4.10a |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation |
Application Notes Manual RAM Replacement in ARC Cores ( PDF )
Databook ARC HS3x Series Databook (Beta) ( PDF )
ARC Trace Databook (4.10a) ( PDF )
ARC Trace Databook (Beta) ( PDF )
HAPS Reference Design Flow Databook (4.10a) ( PDF )
Datasheet MIPS ARC FastMath Pack for ARC HS Processors ( PDF )
MIPS ARC HS3x Processors Datasheet ( PDF )
Reference Manual ARCv2 FPGA Synthesis Flow (4.10a) ( PDF )
ARCv2 ISA Programmer's Reference Manual for ARC HS3x (4.10a) ( PDF )
ARCv2 ISA Programmer's Reference Manual for ARC HS4x (Beta) ( PDF )
ARCv2 ISA Programmer's Reference Manual for ARC HS4xFS (Beta) ( PDF )
User Guide ARC HS3x Implementation and Integration Guide (4.10a) ( PDF )
ARC HS3x Series Databook (4.10a) ( PDF )
ARC MIPS ASIC Reference Design Flow User's Guide (4.10a) ( PDF )
|
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_fastmath_pack_for_hs |
| Product Code | B559-0 |
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