MIPS ARC® SecureShield® Technology enables the development of Trusted Execution Environments (TEE) on low-power embedded processors.

The MIPS ARC® EM Processors Enhanced Security Package creates a secure environment that protects systems and software using a single ultra-low power processor.

The MIPS ARC SEM processors are performance-efficient, ultra-low
power, compact security processors that enable the integration of security
into SoCs to protect against logical, hardware and physical attacks.

The MIPS ARC® SEM130FS Safety and Security Processor simplifies development of safety-critical automotive applications while enabling designers to integrate security into their SoC to protect against logical, hardware and physical attacks.

Safety Enhancement Package (SEP) Core for use in ISO 26262 safety-compliant embedded automotive applications.

The MIPS ARC® Secure option enables the encrypted-pipeline feature of the ARC 600 Family of processor cores, allowing the processors to run encrypted code by fetching encrypted instructions and decrypting them on-the-fly when needed.

MIPS ARConnect offers a configurable hardware option for efficient inter-core communications such as message passing and interrupt handling.

The MIPS SmaRT module enables rapid software/on-chip real time trace debug with minimal increase in die size and no power consumption penalty by diagnosing bugs that are non-reproducible in system simulators, or only become apparent when the system is run at full speed.

Complete, standalone platforms that enable software development, code porting, software debugging and system analysis.

MIPS ARC FPX Floating Point Extension is integrated into the MIPS ARC processor core, and it’s designed to boosts performance by accelerating computations for large dynamic range data sets and when high precision is required.