ARC Functional Safety Processors support ASIL B & ASIL D safety levels to simplify safety-critical automotive SoC development and accelerate ISO 26262 qualification.
MIPS ARC Functional Safety Processor IP Read More »
Nexus 5001 is an open industry standard that provides a general-purpose interface for the software development and debug of embedded processors.
MIPS ARC® NPX Neural Processor IP family provides a high-performance, power- and area-efficient IP solution for a range of applications requiring AI enabled SoCs.
MIPS ARC NPX6 NPU Family for AI / Neural Processing Read More »
ARC Processors provide industry’s best performance efficiency for embedded applications.
MIPS ARC Processors Read More »
Thread is an open protocol that carries IPv6 natively and is based on a robust mesh network with no single point of failure.
ARC-V Processors, part of MIPS Processor IP, provide advanced solutions based on RISC-V ISA for embedded systems with low power and high efficiency.
MIPS ARC-V Processor IP Read More »
MIPS ARC-V RMX-100 Processor IP is optimized for use in embedded applications where power and area are the utmost concern.
MIPS ARC-V RMX-100 Processor IP Read More »
The ARC-V RMX-500 Processor IP is based on the RISC-V instruction set architecture (ISA) and optimized for use in embedded applications where power and performance efficiency are key concerns.
MIPS ARC-V RMX-500 Processor IP Read More »
MIPS ARC-V RMX-110-FS and RMX-510-FS Functional Safety Processors simplify development of safety-critical applications and accelerate ISO 26262 certification of automotive system-on-chips (SoCs).
MIPS ARC-V RMX Series Functional Safety Processor IP Read More »
