MIPS Leverages Siemens’ Veloce proFPGA platform to Implement and Make Available Capabilities of its New High-Performance eVocore P8700 RISC-V Multiprocessor
- May 30, 2023
New Platform to Accelerate Time-to-Market and Reduce Costs & Bottlenecks for SoC Developers SAN JOSE, Calif., May 30, 2023 /PRNewswire/ — MIPS,...
Imperas Collaborates with MIPS and Ashling to Accelerate RISC-V Application Software Development from SoC Concept to Deployment
- March 13, 2023
Oxford, United Kingdom – March 13th, 2023 – Imperas Software Ltd., the leader in RISC-V models and simulation solutions, today announced with MIPS...
MIPS Named Embedded Award Nominee for eVocore P8700 Multiprocessor
- February 28, 2023
Prestigious Global Industry Accolades Honor Top Embedded Systems Innovations SAN JOSE, Calif., Feb. 28, 2023 — MIPS, a leading developer of highly scalable...
MIPS Announces Availability of its first RISC-V IP core – the eVocore P8700 Multiprocessor
- December 12, 2022
Industry’s Highest Performance, Most Scalable RISC-V IP Core Already Adopted for Next-Generation Automotive Applications San Jose, Calif., Dec. 12, 2022 — As the...
MIPS Partners With Mobileye to Accelerate Next Generation Autonomous Driving Technologies and Advanced Driver Assistance Systems
- December 12, 2022
Mobileye Adopts New MIPS eVocore RISC-V CPUs; RISC-V Architecture to Help Drive Future of Vehicle Safety San Jose, Calif., December 12, 2022- MIPS,...
MIPS Selects Imperas for Advanced Verification of High-Performance RISC-V Application-class Processors
- December 7, 2022
Building on 35 years of innovation in RISC processor development, MIPS’ strategic move to RISC-V is supported by Imperas RISC-V Reference Models, Verification...
We’re Getting Ready to Launch Something Big at RISC-V Summit 2022!
- December 6, 2022
RISC-V Summit has always been the ideal venue to unveil new innovations that drive higher performance and greater scalability for today’s complex applications....
Intel Taps MIPS eVocore for Intel Pathfinder for RISC-V
- August 30, 2022
Architecture Will Accelerate Innovation in Open Computing SAN JOSE, Calif., Aug. 30, 2022 /PRNewswire/ — MIPS, a leading developer of highly scalable RISC...
MIPS is thrilled to be part of Imperas’ Open Standard RISC-V Verification Interface (RVVI)
- July 13, 2022
July 11th, 2022 – Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced the latest updates for RVVI (RISC-V Verification Interface)...
MIPS Pivots to RISC-V with Best-In-Class Performance and Scalability
- May 26, 2022
Previews the first IP solutions in the eVocore™ product lineup: P8700 and I8500 multiprocessors SAN JOSE, Calif. – May 10, 2022 – MIPS,...
MIPS chooses Ashling’s RiscFree™ Toolchain for its RISC-V ISA compatible IP cores
- March 28, 2022
SILICON VALLEY, CA, USA – March 28, 2022. Ashling and MIPS announced today that Ashling’s RiscFree™ Toolchain has been extended to support MIPS...
MIPS selects Imperas Reference Models for RISC-V Processor Verification
- November 29, 2021
Oxford, United Kingdom – November 29th, 2021 – Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced with MIPS, Inc., the...
MIPS Inc. Boosts Leadership Team, Eyes RISC-V Market Expansion
- January 3, 2024
In a strategic move poised to invigorate the RISC architecture processors domain, MIPS Inc., a groundbreaking company in the sector, has announced the...
Sameer Wasson’s Vision for MIPS/RISC-V
- December 14, 2023
MIPS, a storied CPU IP core company with a tortuous business/management history, is writing a new chapter under the watch of new CEO...
China Deploys Massive RISC-V Server in Commercial Cloud
- November 8, 2023
If the U.S. government intends to curb China’s adoption of emerging RISC-V architecture to develop homegrown chips, it may be getting late. Last...
Embedded Computing Design: MIPS Plans Expansion, Pulls New CEO from TI
- September 6, 2023
The recent growth in RISC-V interest and adoption is hard to deny, and MIPS, a developer of high-performance RISC-V compute IP, is looking...
MIPS taps Siemens FPGA for RISC-V CPU roll out
- May 30, 2023
MIPS is using an FPGA platform from Siemens Digital Industries Software to accelerate software development for its eVocore P8700 RISC-V multiprocessor.
...
Electronic Engineering: MIPS Rolls Out Its First RISC-V Processor Core
- January 9, 2023
Even though the company had telegraphed its big move, MIPS’s adoption of the RISC-V ISA for its future processor cores hit me like...
EE Times: RISC-V Summit 2022: All Your CPUs Belong to Us
- January 3, 2023
MIPS announced that Mobileye adopted its eVocore P8700 for the next-generation EyeQ SoC for autonomous driving and advanced driver assistance systems (ADAS).
...
All About Circuits: “RISC-V is Inevitable”—A Tale of Two RISC-V Summit Keynotes
- December 16, 2022
RISC-V is everywhere. RISC-V is redefining computing. And that’s not just for this quarter. This is for the next era of computing.
...
New Electronics: MIPS makes first RISC-V IP core available
- December 15, 2022
MIPS, a developer of scalable RISC processor IP, has announced the availability of the eVocore P8700, said to be the industry’s highest performance,...
EE World Online: Scalable RISC-V multiprocessor IP promotes efficient SoC uses
- December 14, 2022
MIPS has announced the availability of the eVocore P8700, the industry’s highest-performance, most scalable RISC-V multiprocessor IP. The P8700 has already been licensed...
Forbes: MIPS Joins The RISC-V Gang
- December 13, 2022
Perhaps the biggest news at the RISC-V Summit came from MIPS. The story of MIPS is as full of twists, turns, and surprises...
Design & Reuse: RISC-V Sees Significant Growth and Technical Progress in 2022 with Billions of RISC-V Cores in Market
- December 13, 2022
Members across the ecosystem have continued to innovate with cutting-edge RISC-V hardware and software solutions. MIPS announced the availability of its first RISC-V...