MIPS has been known for delivering low-power, high-performance embedded processor designs, but its MIPS architecture has been eclipsed by other RISC architectures like Arm and lately RISC-V. RISC-V developers are now MIPS’s target audience thanks to its RISC-V-based platforms. I talked with MIPS CEO, Sameer Wasson, about where MIPS is headed (see video above).
Another Major Player Shakes Up the RISC-V Arena Read More »
Sameer Wasson is passionate about RISC-V architecture and recently became CEO of MIPS to show the world how important an architecture it is. He uses words like “freedom” when talking about how MIPS and RISC-V can change how developers view the coming demands on software, especially as cars become software defined and where over-the-air updates
CES: MIPS CEO Sameer Wasson sees RISC-V as path to freedom Read More »
MIPS has been know for delivering low power, high performance embedded processor designs but its MIPS architecture has been eclipsed by other RISC architectures like Arm and lately RISC-V. RISC-V developers are now MIPS target audience as its primary platforms are now RISC-V-based.
Why is MIPS Putting its Primary Focus on RISC-V? Read More »
Sometimes the world can be a funny old place. Take computer companies, for example. Some (like IBM) seem to have been around forever, and they also seem destined to stay around forever.
Is MIPS Poised to Take the RISC-V World by Storm? Read More »
The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled “Examining China’s Grand Strategy For RISC-V” is part of their China Brief segment and leans on the security concerns of RISC-V.
China Is All In on a RISC-V Future Read More »
This coming week, a ridiculous number of people will be in Las Vegas for the annual extravaganza that is CES. First held in 1967, and originally known as the Consumer Electronics Show, the event now covers so many technology segments and products that it’s either the show about nothing or everything, depending on your perspective.
So we had a little bit more going on last week compared to the holiday week before that, but certainly not enough to make me think we’d want to delay this any further. End result: 6.7 is (in number of commits: over 17k non-merge commits, with 1k+ merges) one of the largest kernel releases we’ve
Linux 6.7 release – Main changes, Arm, RISC-V, and MIPS architectures Read More »
MIPS Inc. is emerging as a significant RISC-V processor core licensor under its recently-appointed CEO Sameer Wasson. eeNews Europe interviewed Wasson to find out how he expects to navigate the choppy waters of a processor market in flux.
CEO interview: MIPS’ Sameer Wasson on a RISC-V reboot Read More »
MIPS Inc. (San Jose, Calif.) has recruited Drew Barbier and Brad Burgess to its leadership team, both formerly with RISC-V pioneer SiFive Inc. Barbier joins MIPS as vice president of products and Burgess as chief architect. The appointments follow that of Sameer Wasson, who joined the company as CEO in September 2023 (see MIPS to
MIPS recruits former senior SiFive execs to boost RISC-V play Read More »
Two former SiFive executives have joined the executive leadership team of semiconductor design company MIPS. MIPS, a company focused on the development of high-performance RISC-V compute IP, announced that Drew Barbier has joined as VP of products and Brad Burgess has been named chief architect.
Chip company MIPS poaches two SiFive execs for leadership team Read More »
