The ASIL compliant MIPS ARC® VPXxFS DSP IP is a family of VLIW/SIMD processors enabling automotive system-on-chip (SoC) designers to accelerate advanced driver assistance systems (ADAS), RADAR and LiDAR sensor processing application development and ISO26262 certification for systems using digital signal processing.
The VPXxFS Family supports multiple vector lengths and core configurations:
- 128-bit vector word – VPX2FS (single core), VPX2x2FS (dual core)
- 256-bit vector word – VPX3FS (single core), VPX3x2FS (dual core)
- 512-bit vector word – VPX5FS (single core), VPX5x2FS (dual core), VPX5x4FS (quad core)
- 1024-bit vector word – VPX6FS (single core), VPX6x2FS (dual core), VPX6x4FS (quad core)
The VPXxFS Family comes with integrated hardware safety features such as ECC protection for memories and interfaces, safety monitors and lockstep mechanisms that achieve the most stringent levels of ISO 26262 functional safety compliance.
To speed application software development, the VPXxFS Family is supported by MIPS’ ARC MetaWare tools for Safety, which provide a comprehensive and vector-length agnostic software programming environment that enables code portability among all members of the VPXxFS family. The tool suite includes a safety-certified optimizing C/C++ vector compiler, debugger, instruction set simulator, as well as vector-based DSP, machine learning inference, linear algebra and vision processing libraries.
MIPS ARC VPXxFS DSP Processor Block Diagram
Highlights
- Integrated hardware safety features with minimal area and power impact for full ASIL compliance, certified for ASIL D systematic, up to ASIL C random
- Four-way VLIW architecture combining scalar and vector operations
- 128-bit, 256-bit, 512-bit and 1024-bit vector lengths
- 8, 16, and 32-bit integer SIMD engines
- IEEE 754-compliant vector floating point unit option offers single-precision or half precision operations and advanced math functions
- Dual vector floating point SIMD pipes
- Hardware acceleration for linear and non-linear math functions
- Single- and multicore-configured offerings
- ARC MetaWare tools including a safety certified auto-vectorizing C/C++ compiler, debugger, simulator, vector DSP, vector linear algebra libraries, vision libraries and neural network SDK
Licensable Options
Product Details
Product Details
| 128-bit Vector DSP IP, Single Core with Functional Safety | STARs | Subscribe |
| 256-bit Vector DSP IP, Single Core with Functional Safety | STARs | Subscribe |
| 512-bit Vector DSP IP, Dual Core with Functional Safety | STARs | Subscribe |
| 512-bit Vector DSP IP, Quad Core with Functional Safety | STARs | Subscribe |
| 512-bit Vector DSP IP, Single Core with Functional Safety | STARs | Subscribe |
| Description | 128-bit Vector DSP IP, Single Core with Functional Safety |
| Name | dwc_arc_vpx2fs_dsp |
| Version | 2.00a-lca01 |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation | Show Documents
|
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_vpx2fs_dsp |
| Product Code | F941-0 |
| Description | 256-bit Vector DSP IP, Single Core with Functional Safety |
| Name | dwc_arc_vpx3fs_dsp |
| Version | 2.00a-lca02 |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation | Show Documents
|
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_vpx3fs_dsp |
| Product Code | F937-0 |
| Description | 512-bit Vector DSP IP, Dual Core with Functional Safety |
| Name | dwc_arc_vpx5x2fs_dsp |
| Version | 2.20a-lca02 |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation | Show Documents
|
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_vpx5x2fs_dsp |
| Product Code | F933-0 |
| Description | 512-bit Vector DSP IP, Quad Core with Functional Safety |
| Name | dwc_arc_vpx5x4fs_dsp |
| Version | 2.20a-lca01 |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation | Show Documents
|
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_vpx5x4fs_dsp |
| Product Code | F934-0 |
| Description | 512-bit Vector DSP IP, Single Core with Functional Safety |
| Name | dwc_arc_vpx5fs_dsp |
| Version | 2.20a-lca03 |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation | Show Documents
|
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_vpx5fs_dsp |
| Product Code | E832-0 |
Resources
Brochure MIPS IP Brochure A comprehensive portfolio of leading-edge MIPS IP. Download
Article MIPS IP Technical Bulletin In-depth technical articles, white papers, videos, webinars, product announcements and more. Read now
Brochure IP Solutions for Edge AI A collection of articles on innovations and best practices. Download
Find Your IP
Search for IP
Quickly identify and access the right IP solutions for your project needs.
Foundation IP Selector
Find embedded memory and logic IP for your SoC design.
Non-Volatile Memory IP Selector
Find silicon-proven NVM IP for your SoC design needs.