Executives’ Technical Prowess Will Help Drive Innovation and Accelerate Product Development to Meet Customer Demand for AI Compute and RISC-V SAN JOSE, CA – April 9, 2024 – MIPS, a leading developer of efficient and configurable IP compute cores, today announced the addition of three accomplished technology and semiconductor industry professionals dedicated to driving MIPS’ […]
Live Demonstration of Synopsys ImperasFPM Models for MIPS Processors at Embedded World 2024 Showcases Collaboration for RISC-V-Based Designs SAN JOSE, CA – April 04, 2024 – MIPS, a leading developer of efficient and configurable IP compute cores, today announced that it has expanded its collaboration with Synopsys, Inc. to accelerate ecosystem enablement of MIPS RISC-V IP and
MIPS, a leading developer of efficient and configurable compute cores, today announced the company’s global expansion with the launch of a new R&D center in Austin, TX, making this the second office expansion in Texas after Dallas. MIPS plans to tap into the growing AI engineering talent in Texas and continue to build deeper roots in the community by partnering with local universities and schools.
Rebrand Reflects the Company’s Strategic Focus on Giving Customers the Freedom to Innovate Compute in the Automotive, Data Center and Embedded Markets. SAN JOSE, CA – January 09, 2024 – MIPS, a leading developer of efficient and configurable compute cores, today announced its strategic rebrand that is being unveiled at the Consumer Electronics Show (CES
MIPS Launches New Corporate Brand At CES 2024 Read More »
Watch the Video: At MIPS, we are giving our customers the freedom to innovate compute in the automotive, data center and embedded markets: the freedom to select an open architecture, break down system bottlenecks, and not be constrained by a single ISA. We are helping customers migrate their software code base with open source standards
MIPS: Freedom to Innovate Compute Read More »
Former SiFive Leaders to Help Drive IP Innovation and Market Penetration SAN JOSE, CA – January 03, 2024 – MIPS, a leading developer of high- performance RISC-V compute IP, today announced the addition of two semiconductor industry veterans to its leadership team. Drew Barbier joins the company as VP of Products and Brad Burgess has
MIPS Welcomes New Executives as Part of Company’s Growth and Expansion Read More »
Company’s First RISC-V Product Paves Way for Future of Chip Development SAN JOSE, Calif., March 16, 2023 /PRNewswire/ — MIPS, a leading developer of highly scalable RISC processor IP, has been named winner of the SoC/IP/IC Design category at this year’s embedded world International conference in Nuremberg, Germany. The annual embedded award honors outstanding
MIPS Takes Top Honors at Embedded World for eVocore P8700 Multiprocessor Read More »
New Platform to Accelerate Time-to-Market and Reduce Costs & Bottlenecks for SoC Developers SAN JOSE, Calif., May 30, 2023 /PRNewswire/ — MIPS, a leading developer of highly scalable RISC processor IP, has collaborated with Siemens Digital Industries Software, a global electronic design automation leader, to speed time-to-market and accelerate software development for customers of
Oxford, United Kingdom – March 13th, 2023 – Imperas Software Ltd., the leader in RISC-V models and simulation solutions, today announced with MIPS and Ashling a new 3-way collaboration to support developers across all aspects of RISC-V software development for advanced processor applications. Based on the Imperas reference models for the MIPS eVocore P8700 RISC-V
Prestigious Global Industry Accolades Honor Top Embedded Systems Innovations SAN JOSE, Calif., Feb. 28, 2023 — MIPS, a leading developer of highly scalable RISC processor IP, has been named an Embedded Award nominee for the company’s eVocore (™) P8700 multiprocessor system, the industry’s most scalable RISC-V CPU IP core. As part of the Embedded World
MIPS Named Embedded Award Nominee for eVocore P8700 Multiprocessor Read More »
