The MIPS ARC® EM9D and EM11D processors are optimized for DSP-intensive functions such as sensor fusion, voice detection, speech recognition and audio processing that are common in Internet of Things (IoT) and other embedded applications. Typical “always-on” applications such as those in the IoT market need low power consumption, optimum device performance and extended battery life.
The ARC EM9D and EM11D processors are based on the ARCv2DSP Instruction Set Architecture (ISA), which adds over 150 optimized DSP instructions to the area- and code-efficient real-time ARCv2 RISC ISA. The EM9D and EM11D cores feature a power-efficient unified 32×32 MUL/MAC unit and support for fixed-point DSP data types and vector/SIMD (single instruction multiple data) operations.
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These processors improve DSP performance by up to 3X and more adding multi-banked (XY) memories architected to alleviate DSP applications’ need for fast memory accesses while performing repeated mathematical operations on arrays of numbers. The XY memory system consists of memory banks, address pointers, address update registers and address generation units (AGUs) and supports multiple configuration options (logical partitions with data CCM) as well as interleaving or splitting one logical partition into two physical memories supporting even and odd logical words respectively. The address generation units provide additional addressing modes such as modulo, bit reverse and variable +/- linear offset. They make complex address calculations independently, removing a significant overhead from the CPU and ensuring efficient memory access without cycle penalties.
To facilitate rapid development of software for EM9D and EM11D, the ARC MetaWare Development Toolkit has been enhanced to offer full C/C++ programming support for the cores’ DSP instructions and XY memory as well as a rich library of DSP functions.
MIPS ARC EM DSP Processors for Low-Power Embedded Systems
Learn about MIPS’ DesignWare® ARC® EM DSP Family, consisting of the ARC EM5D, EM7D, EM9D, and EM11D processors that are specifically designed for ultra-low power embedded DSP applications. The processors are ideally suited for DSP-intensive functions such as sensor fusion, voice detection, speech recognition and audio processing that are common in Internet of Things (IoT) and other embedded applications.
Highlights & Key Features
- XY multi-banked memory to improve MAC/cycle performance
- ARCv2DSP ISA adds over 150 DSP Instructions
- Fixed point, vector and SIMD DSP processing support
- Power-efficient unified 32×32 MUL/MAC unit
- Highly configurable DSP and processor features for optimal design
- Easy DSP programming support with Metaware C/C++ Compiler
- Feature-rich DSP software library for easy algorithm programming
- Optional hardware divider
- 1.81 DMIPS/MHz and 4.42 CoreMark/MHz
- Support acceleration for APEX Processor Extensions
- JTAG debug interface
Licensable Options
Product Details
| Description | ARC EM11D Enhanced 32-bit processor core, ARCv2DSP ISA with Cache and XY Memory |
| Name | dwc_arc_em11d_core |
| Version | 5.70b |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation | Show Documents Hide Documents Application NotesARC Processors Not Susceptible to Meltdown and Spectre Vulnerabilities ( PDF ) DatabookARC EM APEX Databook (5.70a) ( HTML ) ARC EM APEX Databook (5.70b) ( PDF ) ARC EM Databook (5.70a) ( HTML ) ARC EM Databook (5.70b) ( PDF ) ARC Trace Databook (EM 5.70a) ( HTML ) ARC Trace Databook (EM 5.70b) ( PDF ) DSP Library Performance Databook for ARC EM (latest) ( PDF ) DatasheetMIPS ARC EM9D and EM11D DSP-Enhanced Processors Datasheet ( PDF ) Programming GuideProgrammer's Reference Manual for ARC EM Processors (5.70a) ( HTML ) Programmer's Reference Manual for ARC EM Processors (5.70b) ( PDF ) Programmer's Reference Manual for ARC EM Processors (Public Edition) ( PDF ) User GuideARC EM Implementation and Integration Guide (5.70a) ( HTML ) ARC EM Implementation and Integration Guide (5.70b) ( PDF ) ARCv2 FPGA Synthesis Flow (EM 5.70a) ( HTML ) ARCv2 FPGA Synthesis Flow (EM 5.70b) ( PDF ) MIPS ASIC Reference Design Flow User's Guide (EM 5.70a) ( HTML ) MIPS ASIC Reference Design Flow User's Guide (EM 5.70b) ( PDF ) White PaperDesigning an Efficient DSP Solution: Choosing the Right Processor and Software Development Toolchain ( PDF ) |
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_em11d_core |
| Product Code | B139-0 |
| Description | ARC EM9D 32-bit DSP Enhanced Processor core based on the ARCv2DSP ISA with CCM and XY Memory |
| Name | dwc_arc_em9d_core |
| Version | 5.70b |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation | Show Documents Hide Documents Application NotesARC Processors Not Susceptible to Meltdown and Spectre Vulnerabilities ( PDF ) DatabookARC EM APEX Databook (5.70a) ( HTML ) ARC EM APEX Databook (5.70b) ( PDF ) ARC EM Databook (5.70a) ( HTML ) ARC EM Databook (5.70b) ( PDF ) ARC Trace Databook (EM 5.70a) ( HTML ) ARC Trace Databook (EM 5.70b) ( PDF ) DSP Library Performance Databook for ARC EM (latest) ( PDF ) DatasheetMIPS ARC EM9D and EM11D DSP-Enhanced Processors Datasheet ( PDF ) Programming GuideProgrammer's Reference Manual for ARC EM Processors (5.70a) ( HTML ) Programmer's Reference Manual for ARC EM Processors (5.70b) ( PDF ) Programmer's Reference Manual for ARC EM Processors (Public Edition) ( PDF ) User GuideARC EM Implementation and Integration Guide (5.70a) ( HTML ) ARC EM Implementation and Integration Guide (5.70b) ( PDF ) ARCv2 FPGA Synthesis Flow (EM 5.70a) ( HTML ) ARCv2 FPGA Synthesis Flow (EM 5.70b) ( PDF ) MIPS ASIC Reference Design Flow User's Guide (EM 5.70a) ( HTML ) MIPS ASIC Reference Design Flow User's Guide (EM 5.70b) ( PDF ) White PaperDesigning an Efficient DSP Solution: Choosing the Right Processor and Software Development Toolchain ( PDF ) Efficient Low-Cost Implementation of NB-IoT for Smart Applications ( PDF ) Say Welcome to the Machine - Low-Power Machine Learning for Smart IoT Applications ( PDF ) 欢迎迈入机器时代 面向智能物联网应用的低功耗机器学习技术 ( PDF ) |
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_em9d_core |
| Product Code | B138-0 |
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