Overview
The MIPS ARC® 750D 32-bit configurable processor core is ideal for complex system-on-chips (SoCs) running Linux, Android or other high-end operating systems. It is a complete application processor for home entertainment systems, portable devices such as smartphones, automotive telematics systems and many other information-based products. In addition, optional custom extensions may be incorporated to achieve application performance levels unattainable with fixed architecture cores.
The MIPS ARC 750D processor core is supported by a full suite of software and hardware development tools. The suite includes the MetaWare Development Kit, which generates highly efficient code that is ideal for embedded applications and ARC simulators including xCAM and nSIM, and the ARChitect configuration tool.
Highlights & Key Features
- A highly configurable architecture allows SoC designers to include only the core features that are required for their specific application, resulting in smaller die size and lower power than can be achieved with a fixed core.
- User-defined instruction and register extensions deliver 5 - 100 times performance improvement of critical routines.
- Instruction and data cache support and closely coupled (single-cycle) memories provide fast, predictable computation.
- Memory Management Unit (MMU) to support high-end operating systems such as Linux and Android.
- Built-in DSP features include instruction and register extensions that accelerate signal processing algorithms.
- Optional ARC XY Advanced DSP subsystem delivers the performance of dedicated DSP cores.
- MIPS ARCompact™ 16-/32-bit Instruction Set Architecture reduces code size by up to 40 percent compared to 32-bit only instruction sets.
- Inter-core communication ISA support, multi-core debug environment and flexible interfaces enable multi-core designs.
- JTAG debug port and optional embedded hardware breakpoints facilitate software debug.
- Delivered as synthesizable RTL source code (Verilog®), the MIPS ARC 750D core is fully compatible with industry standard design methodologies and tool flows.
Product Details
Products
Downloads & Documentation
| Description | ARC 750D Linux/Android compatible, 32-bit processor core with cache, MMU, optional DSP, FPU |
| Name | dwc_arc_750d_core |
| Version | 4.12a |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation |
Application Notes ARC Processors Not Susceptible to Meltdown and Spectre Vulnerabilities ( PDF )
Debugging Dynamically Linked Apps and Shared Libs Using ARC GNU gdbserver-GDB ( PDF )
Design-For-Test Implementation ( PDF )
Getting Started with Embedded Programming on ARC ( PDF )
Optimizing DPFPfast Floating Point Extension for Lower Cycle Count ( PDF )
Pipeline Stall Hazards ( PDF )
XY-Memory Pointer Buffer Update ( PDF )
Databook ARC 700 Databook ( PDF )
ARC RDF Synplicity Databook ( PDF )
ARC RDF Xilinx Databook ( PDF )
Datasheet Linux Kernel for MIPS ARC Processors ( PDF )
MIPS ARC 750D Datasheet ( PDF )
QuickStart ARC MIPS RDF Getting Started ( PDF )
ML50x Development Board Getting Started 4.90b ( PDF )
Reference Manual ARC 700 DSPlib Reference ( PDF )
ARC HAPS51 Board Connections and Settings Reference Manual ( PDF )
ARC Linux Syscall Application Binary Interface ( PDF )
ARCompact ISA Programmers Reference ( PDF )
ARC® 700 DSP Options Reference ( PDF )
Release Notes ARC ML509 Development Systems Release Notes ( PDF )
ARC MIPS RDF Release Notes ( PDF )
Success Story ARC 700 on Altera FPGA ( PDF )
Tutorial EIA Cookbook ( PDF )
User Guide ARC MIPS RDF User Guide ( PDF )
|
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_750d_core |
| Product Code | 4794-0, 8026-0, 8027-0, 8028-0 |
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