The MIPS ARC® EM Overlay Management Unit option enables address translation and access permission validation with minimal power and area overhead while boosting the ability to run larger and more data intensive operations.

The MIPS ARC® EM Performance Mode Option provides a coarse-grained multi-tasking architecture featuring a 4-cycle hardware context switch, which allows for higher performance in real-time, low-latency control applications while adding wider memory interface support to improve system I/O performance.