Author name: newmips

manuel CANL3bzp6wU unsplash

Gaming Info Tech: MIPS Claims “Greatest-In-Class Efficiency” With New RISC-V eVocore CPUs

MIPS Tech is now not engaged on their MIPS CPU instruction set structure however has been taking up RISC-V based mostly designs. At this time the corporate made the daring announcement for his or her new eVocore P8700 and I8500 multiprocessor IP cores that they provide “Greatest-In-Class Efficiency and Scalability.”

Gaming Info Tech: MIPS Claims “Greatest-In-Class Efficiency” With New RISC-V eVocore CPUs Read More »

pr 1

MIPS Pivots to RISC-V with Best-In-Class Performance and Scalability

Previews the first IP solutions in the eVocore™ product lineup: P8700 and I8500 multiprocessors SAN JOSE, Calif. – May 10, 2022 – MIPS, a leading developer of highly scalable RISC processor IP, announces its entrance to the RISC-V market, previewing the first products in its eVocore™ product lineup. The new eVocore P8700 and I8500 multiprocessor

MIPS Pivots to RISC-V with Best-In-Class Performance and Scalability Read More »

manuel CANL3bzp6wU unsplash

MIPS chooses Ashling’s RiscFree™ Toolchain for its RISC-V ISA compatible IP cores

SILICON VALLEY, CA, USA – March 28, 2022. Ashling and MIPS announced today that Ashling’s RiscFree™ Toolchain has been extended to support MIPS RISC-V ISA based IP cores. RiscFree™ is Ashling’s Integrated Development Environment (IDE) including a compiler and debugger for RISC-V based development, and it now has support for MIPS RISC-V ISA based IP cores,

MIPS chooses Ashling’s RiscFree™ Toolchain for its RISC-V ISA compatible IP cores Read More »

MIPS selects Imperas Reference Models for RISC-V Processor Verification

Oxford, United Kingdom – November 29th, 2021 – Imperas Software Ltd., the leader in RISC-V simulation solutions, today announced with MIPS, Inc., the processor technology company focused on the commercialization of RISC-based processor architectures and IP cores, the continuation and extension to the long-standing relationship with simulation and verification support for RISC-V. Since 2010, MIPS has partnered

MIPS selects Imperas Reference Models for RISC-V Processor Verification Read More »

Shot,Of,A,Futuristic,Self driving,Van,Moving,On,A,Public

Restructured Wave Computing/MIPS Business Moves ahead as MIPS

SANTA CLARA, Calif., March 1, 2021 /PRNewswire/ — Wave Computing, Inc. (“Wave”) and its subsidiaries including MIPS Tech, the processor technology company focused on the commercialization of RISC-based processor architectures and IP cores, today emerged from Chapter 11 bankruptcy protection. Going forward, the restructured business (“the Company”) will be known as MIPS, reflecting the Company’s strategic focus on

Restructured Wave Computing/MIPS Business Moves ahead as MIPS Read More »

Scroll to Top