The MIPS ARC® EM5D and EM7D processors are optimized for use in low-power embedded applications where DSP performance and low-power consumption are requirements.
The EM5D and EM7D processors are based on the ARCv2DSP Instruction Set Architecture (ISA), which adds over 150 optimized DSP instructions to the area- and code-efficient real-time ARCv2 RISC ISA. The EM5D and EM7D cores feature a power-efficient unified 32×32 MUL/MAC unit and support for fixed-point DSP data types and vector/SIMD (single instruction multiple data) operations. The EM DSP processors are configurable, enabling each instance of the core to be tailored to suit its specific application or DSP workload. For example the data path width can be selected and support for rounding, complex, divide and square root can be enabled or disabled.
The ARC EM DSP family features a balanced 3-stage Harvard architecture pipeline that provides efficient throughput and the cores offer excellent real-time control and DSP performance within a footprint as small as 0.03 mm2.
To enable easy DSP software development, the ARC MetaWare Development Toolkit features a rich DSP software library and the included enhanced C/C++ Compiler supports all of the new DSP functionality and offers industry-leading code density.
Highlights & Key Features
- ARCv2DSP ISA adds over 150 DSP Instructions
- Fixed point, vector and SIMD DSP processing support
- Power-efficient unified 32×32 MUL/MAC unit
- Highly configurable DSP and processor features for optimal design
- Easy DSP programming support with Metaware C/C++ Compiler
- Feature-rich DSP software library for easy algorithm programming
- Optional hardware divider
- 1.81 DMIPS/MHz and 4.18 CoreMark/MHz
- Support acceleration for APEX Processor Extensions
- JTAG debug interface
Licensable Options
Product Details
| Description | ARC EM5D Enhanced 32-bit processor core, ARCv2DSP ISA, for low power embedded DSP applications |
| Name | dwc_arc_em5d_core |
| Version | 5.70b |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation | Show Documents Hide Documents Application NotesARC Processors Not Susceptible to Meltdown and Spectre Vulnerabilities ( PDF ) DatabookARC EM APEX Databook (5.70a) ( HTML ) ARC EM APEX Databook (5.70b) ( PDF ) ARC EM Databook (5.70a) ( HTML ) ARC EM Databook (5.70b) ( PDF ) ARC Trace Databook (EM 5.70a) ( HTML ) ARC Trace Databook (EM 5.70b) ( PDF ) DSP Library Performance Databook for ARC EM (latest) ( PDF ) Programming GuideProgrammer's Reference Manual for ARC EM Processors (5.70a) ( HTML ) Programmer's Reference Manual for ARC EM Processors (5.70b) ( PDF ) Programmer's Reference Manual for ARC EM Processors (Public Edition) ( PDF ) User GuideARC EM Implementation and Integration Guide (5.70a) ( HTML ) ARC EM Implementation and Integration Guide (5.70b) ( PDF ) ARCv2 FPGA Synthesis Flow (EM 5.70a) ( HTML ) ARCv2 FPGA Synthesis Flow (EM 5.70b) ( PDF ) MIPS ASIC Reference Design Flow User's Guide (EM 5.70a) ( HTML ) MIPS ASIC Reference Design Flow User's Guide (EM 5.70b) ( PDF ) White PaperConfigurable and Extensible 32-Bit RISC Processors for Next-Generation SSDs ( PDF ) Designing an Efficient DSP Solution: Choosing the Right Processor and Software Development Toolchain ( PDF ) White Paper: Securing the Internet of Things Using Hardware Rooted Processor Security - An Architect's Guide ( PDF ) |
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_em5d_core |
| Product Code | A628-0 |
| Description | ARC EM7D DSP Enhanced 32-bit processor core with caches, ARCv2DSP ISA, for low power embedded DSP ap |
| Name | dwc_arc_em7d_core |
| Version | 5.70b |
| ECCN | 3E991/NLR |
| STARs | Open and/or Closed STARs |
| myDesignWare | Subscribe for Notifications |
| Product Type | DesignWare Cores |
| Documentation | Show Documents Hide Documents Application NotesARC Processors Not Susceptible to Meltdown and Spectre Vulnerabilities ( PDF ) DatabookARC EM APEX Databook (5.70a) ( HTML ) ARC EM APEX Databook (5.70b) ( PDF ) ARC EM Databook (5.70a) ( HTML ) ARC EM Databook (5.70b) ( PDF ) ARC Trace Databook (EM 5.70a) ( HTML ) ARC Trace Databook (EM 5.70b) ( PDF ) DSP Library Performance Databook for ARC EM (latest) ( PDF ) Programming GuideProgrammer's Reference Manual for ARC EM Processors (5.70a) ( HTML ) Programmer's Reference Manual for ARC EM Processors (5.70b) ( PDF ) Programmer's Reference Manual for ARC EM Processors (Public Edition) ( PDF ) User GuideARC EM Implementation and Integration Guide (5.70a) ( HTML ) ARC EM Implementation and Integration Guide (5.70b) ( PDF ) ARCv2 FPGA Synthesis Flow (EM 5.70a) ( HTML ) ARCv2 FPGA Synthesis Flow (EM 5.70b) ( PDF ) MIPS ASIC Reference Design Flow User's Guide (EM 5.70a) ( HTML ) MIPS ASIC Reference Design Flow User's Guide (EM 5.70b) ( PDF ) White PaperDesigning an Efficient DSP Solution: Choosing the Right Processor and Software Development Toolchain ( PDF ) |
| Toolsets | Qualified Toolsets |
| Download | dwc_arc_em7d_core |
| Product Code | A629-0 |
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