MIPS Blog

MIPS P8700 RISC-V Processor for Advanced Functional Safety Systems

Driving RISC-V Application Cores into Automotive and Industrial MIPS, a GlobalFoundries company, offers processor IP, software, tools, and custom silicon platforms for advancing...

MIPS and GlobalFoundries: Powering the Next Wave of Physical AI

Today marks a bold new chapter for MIPS as we enter into a definitive agreement to be acquired by GlobalFoundries (GF). This strategic...

Innovation Starts at Product Inception

Building innovative new products requires a detailed and comprehensive understanding of the target use cases. Building a visionary new platform with cutting-edge capabilities...

Introducing the MIPS Atlas Portfolio for Physical AI

Physical AI will enable the next generation of autonomous robots to sense the world around them, think to create a plan based on...

Introducing MIPS Sense data movement engines

Autonomous platforms sense the world around them with a variety of inputs, from radar, lidar, and cameras, to gyroscopes, accelerometers, and atmospheric sensors....

Real-Time Intelligence for Physical AI at the Edge

The age of physical AI is approaching, taking the virtual world of digital twins and move it into the physical world of autonomous...

Moving the World with MIPS M8500 Real-Time Compute Solutions

The advent of physical AI promises to deliver autonomous platforms that are more able to operate in the changing world around them. Decisions...

The Shift-Left Approach to Software Development

For years, the industry has advocated for “shifting left” in software development. This methodology allows software teams to begin their work earlier, leveraging...

Reimagining AI Infrastructure: The Power of Converged Back-end Networks

Introduction The rise of AI has unleashed an insatiable demand for faster, smarter, and more scalable data center networks. As GPUs and accelerators...

Scaling Out Deep Learning (DL) Inference and Training: Addressing Bottlenecks with Storage, Networking with RISC-V CPUs

  Scale out DL inference or training is no longer just a compute problem. Networking and storage optimization are becoming more critical. This...

Migrating the CPU IP Development from MIPS to RISC-V Instruction Set Architecture

The rise of opensource RISC-V CPU Instruction Set Architecture (ISA) has led many developers to consider migrating from existing popular computer architectures like...

Say Goodbye to Limits and Hello to Freedom of Scalability in the MIPS P8700

Do you need more compute elements? Do you need more memory? Do you need more cache? Last week we announced the MIPS P8700,...

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MIPS P8700 Processors for Automotive Driver Assistance Systems and Autonomous Driving System-on-Chips

Autonomous Driving (AD) is the ability of a vehicle to drive itself. ADAS (Advanced Driver Assistance Systems) are electrical/electronic systems designed to assist a driver of a vehicle using a suite of sensors like cameras, radar, lidars, ultrasonics and highperformance SoCs which are increasingly shifting towards Artificial Intelligence.

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Auto Re-vectorization Whitepaper

The methodology was designed to systematically transform other vector/SIMD ISA (x86 AVX, ARM SVE/Neon, etc) intrinsic code into RISC-V Vector assembly and analyze its performance metrics. The procedure consists of first converting the input intrinsic code (other vector ISA) to LLVM Vector IR, then modifying the input ISA attributes to RISC-V Vector attributes, applying LLVM vector optimization passes (for a specific RISC-V Vector Processor) and finally lowering the optimized LLVM Vector IR to the target RISC-V Vector CPU assembly code.

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The Benefits of Hardware Multi-Threading

Increase Silicon Efficiency for Higher Data Processing with the Same Area and Power

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HyperFRAME Research

HyperFRAME Research delivers in depth research and insights across the global technology landscape, spanning everything from hyperscale public cloud to the mainframe and everything in between. HyperFRAME industry analysts have published their analysis of the MIPS Atlas portfolio and turnkey approach to Physical AI compute subsystems.

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