Not All RISC-V IP is the Same
MIPS CEO Sameer Wasson discusses the company’s approach to RISC-V and how its P8700 RISC-V cores stack up against the competition.
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In the News
Multicore RISC-V Designs for Smart Automotive Apps
A cluster of six MIPS P8700 RISC-V cores can be replicated up to 64 times to support 768 execution threads.
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AI-Enabled RISC-V Cores Target ASIL B Automotive Apps
The MIPS P8700 RISC-V core, which implements a RISC-V ISA, aims at ASIL B and ISO 26262 functional safety.
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MIPS releases RISC-V CPU for autonomous vehicles
MIPS released its P8700 CPU based on the RISC-V computing architecture to target driver assistance and autonomous vehicle applications.
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Addressing AI While Keeping the MIPSiness In MIPS
MIPS, now targeting AI applications for its application-specific data movement cores, is evolving with a careful eye on its strengths.
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Sameer Wasson: Have a Steady Hand, Don’t be Distracted
In this episode of Silicon Grapevine, we talk to MIPS CEO Sameer Wasson about the experience of going from an intern doing FPGA programming
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The New MIPS – Solving Compute Where It Happens
Timing, opportunity and geographic location matter in life – when we decide to do important things and where we decide to live and work.
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Embedded Quest at Embedded World
In our quest for “useful” embedded systems, the Ojo-Yoshida Report roamed the show floor at Embedded World, cornering vendors and asking two questions:
1. What problems are you solving with your new technology?
2. What useful applications do you believe your product/technology will enable?
Although we heard many different answers and solutions with different emphasis, one point of broad agreement is that IoT has made “connectivity” an imperative for embedded.
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MIPS Adds 3 Managers from NVIDIA, Google and SiFive
MIPS, a developer of efficient and configurable IP compute cores, today announced the addition of three technology and semiconductor industry professionals dedicated to driving MIPS’ technical differentiation to support the company’s global expansion in the automotive, data center and embedded markets.
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MIPS Expands RISC-V Ecosystem Support to to Enable Early Software Development for Multi-threaded Cores
MIPS, a leading developer of efficient and configurable IP compute cores, today announced that it has expanded its collaboration with Synopsys, Inc. to accelerate ecosystem enablement of MIPS RISC-V IP and their customer’s ability to innovate compute without constraints.