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Autonomous platforms sense the world around them with a variety of inputs, from radar, lidar, and cameras, to gyroscopes, accelerometers, and atmospheric sensors. These sensors are rapidly increasing in fidelity with more resolution, color depth, accuracy, and increased sampling periods generating exponentially more data. Fusing this data together, establishing priorities and the right data formats,

The age of physical AI is approaching, taking the virtual world of digital twins and move it into the physical world of autonomous platforms that can understand the world around them and make decisions, and quickly adapt to new tasks. Today’s robots specialize in narrowly defined tasks, built for simple automation of repetitive behavior. The

The advent of physical AI promises to deliver autonomous platforms that are more able to operate in the changing world around them. Decisions made by the physical AI models need to be enacted by robots that move in a safe, precise manner. With physical AI models using reinforcement learning to understand the world, the next-generation

For years, the industry has advocated for “shifting left” in software development. This methodology allows software teams to begin their work earlier, leveraging virtual platforms for algorithm and application development. By aligning hardware and software teams from the start, the process becomes more efficient, catching specification vagaries early. Instead of waiting for hardware to be

Introduction The rise of AI has unleashed an insatiable demand for faster, smarter, and more scalable data center networks. As GPUs and accelerators become the backbone of AI training and inference, traditional network designs struggle to keep up with the explosive growth in data and computational intensity. The network is no longer just for connectivity

  Scale out DL inference or training is no longer just a compute problem. Networking and storage optimization are becoming more critical. This is evident with a new addition to MLPerf standards with regards to storage. In this blog we briefly explore how RISC-V can help here. The increasing complexity and data demands of deep

The rise of opensource RISC-V CPU Instruction Set Architecture (ISA) has led many developers to consider migrating from existing popular computer architectures like x86, Arm, MIPS and more to RISC-V CPU ISA. This transition offers various advantages, including an open-source framework and extensive community support. In this blog, we’ll explore typical migration strategies and considerations

Do you need more compute elements? Do you need more memory? Do you need more cache? Last week we announced the MIPS P8700, the industry’s first AI-enabled RISC-V automotive CPU for ADAS and autonomous vehicles. The MIPS P8700 gives you the freedom to choose how to solve your problem.

The market is experiencing a major shift to the RISC-V ISA and MIPS is helping to fuel this transition with high performance RISC-V cores, including debug, trace and performance tools enabling the tools ecosystem. The commercial success of the MIPS architecture can, to some degree, be attributed to deploying advanced debug, trace and performance monitoring