The advent of physical AI promises to deliver autonomous platforms that are more able to operate in the changing world around them. Decisions made by the physical AI models need to be enacted by robots that move in a safe, precise manner. With physical AI models using reinforcement learning to understand the world, the next-generation […]
Moving the World with MIPS M8500 Real-Time Compute Solutions Read More »
For years, the industry has advocated for “shifting left” in software development. This methodology allows software teams to begin their work earlier, leveraging virtual platforms for algorithm and application development. By aligning hardware and software teams from the start, the process becomes more efficient, catching specification vagaries early. Instead of waiting for hardware to be
The Shift-Left Approach to Software Development Read More »
The new MIPS Atlas product suite delivers cutting-edge compute subsystems that empower autonomous edge solutions to sense, think and act with precision, driving innovation across the growing physical AI opportunity in industrial robotics and autonomous platform markets. SAN JOSE, CA. – March 4th, 2025 – MIPS, the world’s leading supplier of compute subsystems for autonomous
MIPS Drives Real-Time Intelligence into Physical AI Platforms Read More »
As analysts anticipate a gradual recovery of the global economy in 2025, technology will play a critical role.
MIPS: Enabling Tech-Driven Recovery Across Key Industries Read More »
MIPS is celebrating its 40th anniversary as a compute IP company this year. Known for a RISC instruction set, the company has risen and fallen, was private, then owned by SGI, was private again for a while, then Imagination Technologies owned it for several years, sold to a VC, Tallwood, in 2017, and then owned by Wave Technologies briefly before returning to the same VC hands.
Introduction The rise of AI has unleashed an insatiable demand for faster, smarter, and more scalable data center networks. As GPUs and accelerators become the backbone of AI training and inference, traditional network designs struggle to keep up with the explosive growth in data and computational intensity. The network is no longer just for connectivity
Reimagining AI Infrastructure: The Power of Converged Back-end Networks Read More »
MIPS CEO Sameer Wasson discusses the company’s approach to RISC-V and how its P8700 RISC-V cores stack up against the competition.
Not All RISC-V IP is the Same Read More »
A cluster of six MIPS P8700 RISC-V cores can be replicated up to 64 times to support 768 execution threads.
Multicore RISC-V Designs for Smart Automotive Apps Read More »
Scale out DL inference or training is no longer just a compute problem. Networking and storage optimization are becoming more critical. This is evident with a new addition to MLPerf standards with regards to storage. In this blog we briefly explore how RISC-V can help here. The increasing complexity and data demands of deep
The rise of opensource RISC-V CPU Instruction Set Architecture (ISA) has led many developers to consider migrating from existing popular computer architectures like x86, Arm, MIPS and more to RISC-V CPU ISA. This transition offers various advantages, including an open-source framework and extensive community support. In this blog, we’ll explore typical migration strategies and considerations
Migrating the CPU IP Development from MIPS to RISC-V Instruction Set Architecture Read More »
