MIPS has announced the availability of the eVocore P8700, the industry’s highest-performance, most scalable RISC-V multiprocessor IP. The P8700 has already been licensed for applications including automotive driver assistance systems (ADAS) and autonomous driving.
EE World Online: Scalable RISC-V multiprocessor IP promotes efficient SoC uses Read More »
Perhaps the biggest news at the RISC-V Summit came from MIPS. The story of MIPS is as full of twists, turns, and surprises as any you get in Silicon Valley.
Forbes: MIPS Joins The RISC-V Gang Read More »
Members across the ecosystem have continued to innovate with cutting-edge RISC-V hardware and software solutions. MIPS announced the availability of its first RISC-V IP core, the high performance and scalable eVocore P8700 multiprocessor. MIPS also partnered with Mobileye to accelerate next generation autonomous driving technologies and advanced driver assistance systems with MIPS’ eVocore P8700 RISC-V
MIPS has developed its first licensable CPUs implementing the RISC-V instruction set by repurposing older MIPS-compatible cores. The P8700 and I8500 outperform most other RISC-V designs.
Tech Insights: MIPS Releases First RISC-V CPUs Read More »
With its transition to RISC-V, MIPS is targeting the high-performance segment of the processor market, leveraging its differentiation in real-time features
MIPS pivots to RISC-V, targets high performance processing Read More »
MIPS is showing the first results of its pivot to the RISC-V architecture following the collapse of Wave Computing.
EENews Europe: MIPS Previews its Pivot to RISC-V Read More »
MIPS, a developer of RISC processor IP, is entering into the RISC-V market and has offered previews of its first products in its eVocore product line-up.
New Electronics: MIPS enters RISC-V market with eVocore product line-up Read More »
MIPS is dead, right? Well, there’s now very little done on the architecture itself, MIPS (the company) has decided to switch to RISC-V architecture, and unveiled the eVocore product lineup currently comprised of the eVocore P8700 and I8500 multiprocessor IP cores.
CNX Software: MIPS unveils RISC-V eVocore P8700 and I8500 multiprocessor IP cores Read More »
SAN JOSE, Calif., May 10, 2022 — MIPS, a leading developer of highly scalable RISC processor IP, announces its entrance to the RISC-V market, previewing the first products in its eVocore product lineup. The new eVocore P8700 and I8500 multiprocessor IP cores are the first MIPS products based on the RISC-V open instruction set architecture
HPC Wire: MIPS Pivots to RISC-V with Performance and Scalability Read More »
MIPS Tech is no longer working on their MIPS CPU instruction set architecture but has been taking on RISC-V based designs. Today the company made the bold announcement for their new eVocore P8700 and I8500 multiprocessor IP cores that they offer “Best-In-Class Performance and Scalability.”
Phoronix: MIPS Claims “Best-In-Class Performance” with New RISC-V eVocore CPUs Read More »
