MIPS: Enabling Tech-Driven Recovery Across Key Industries
As analysts anticipate a gradual recovery of the global economy in 2025, technology will play a critical role.
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MIPS at 40
MIPS is celebrating its 40th anniversary as a compute IP company this year. Known for a RISC instruction set, the company has risen and fallen, was private, then owned by SGI, was private again for a while, then Imagination Technologies owned it for several years, sold to a VC, Tallwood, in 2017, and then owned by Wave Technologies briefly before returning to the same VC hands.
Reimagining AI Infrastructure: The Power of Converged Back-end Networks
Introduction The rise of AI has unleashed an insatiable demand for faster, smarter, and more scalable data center networks. As GPUs and accelerators become the backbone of AI training and inference, traditional network designs struggle to keep up with the explosive growth in data and computational intensity. The network is no longer just for connectivity
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Not All RISC-V IP is the Same
MIPS CEO Sameer Wasson discusses the company’s approach to RISC-V and how its P8700 RISC-V cores stack up against the competition.
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Multicore RISC-V Designs for Smart Automotive Apps
A cluster of six MIPS P8700 RISC-V cores can be replicated up to 64 times to support 768 execution threads.
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Scaling Out Deep Learning (DL) Inference and Training: Addressing Bottlenecks with Storage, Networking with RISC-V CPUs
Scale out DL inference or training is no longer just a compute problem. Networking and storage optimization are becoming more critical. This is evident with a new addition to MLPerf standards with regards to storage. In this blog we briefly explore how RISC-V can help here. The increasing complexity and data demands of deep
Migrating the CPU IP Development from MIPS to RISC-V Instruction Set Architecture
The rise of opensource RISC-V CPU Instruction Set Architecture (ISA) has led many developers to consider migrating from existing popular computer architectures like x86, Arm, MIPS and more to RISC-V CPU ISA. This transition offers various advantages, including an open-source framework and extensive community support. In this blog, we’ll explore typical migration strategies and considerations
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Say Goodbye to Limits and Hello to Freedom of Scalability in the MIPS P8700
Do you need more compute elements? Do you need more memory? Do you need more cache? Last week we announced the MIPS P8700, the industry’s first AI-enabled RISC-V automotive CPU for ADAS and autonomous vehicles. The MIPS P8700 gives you the freedom to choose how to solve your problem.
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AI-Enabled RISC-V Cores Target ASIL B Automotive Apps
The MIPS P8700 RISC-V core, which implements a RISC-V ISA, aims at ASIL B and ISO 26262 functional safety.
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MIPS releases RISC-V CPU for autonomous vehicles
MIPS released its P8700 CPU based on the RISC-V computing architecture to target driver assistance and autonomous vehicle applications.
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