Data Center
Enhanced Data Flow and Control for Data Center
- Scale-out solutions
- Many threads of execution
- Low-latency session control
- Deterministic data processing
Simultaneous Multi-threading (SMT)
Take full advantage of silicon real estate with CPUs capable of handling multiple concurrent threads of execution for data movement and control.
Heterogenous Compute
Coherent heterogenous multi-core cluster with a mix of processors, I/O, and accelerators.
Tightly-coupled Memory
Deterministic level-1 data scratchpad RAM for real-time and low-latency applications.
DPU and SmartNIC
As machine learning is rapidly becoming a common part of data center operation, new types of devices are needed to offload the main compute resources. We’re seeing the emergence of data-processing unit (DPUs), smart NICs (network interface cards) and NAS (Network Attached Storage) to handle this operation, as well as more and more AI accelerators within compute elements themselves, and in the storage and networking segments of the data center.
MIPS provides scalable multiprocessors designed to support the transition of the data center to new types of computation such as machine learning acceleration. MIPS solutions offer scalable performance and heterogenous capabilities that enable each cluster of compute resources to include unique combinations of CPUs and AI accelerators. We also provide optimized data-movement solutions for efficient handling of large amounts of data.
Data Center DPU
Streaming Engine
Data Server Storage
Resources
Helping Customers Jump Start MIPS Designs
Get started on your design with MIPS CPUs! Learn more about the growing ecosystem of tools and software supporting our family of RISC-V CPUs.
Latest Blog
Migrating the CPU IP Development from MIPS to RISC-V Instruction Set Architecture
The rise of opensource RISC-V CPU Instruction Set Architecture (ISA) has led many developers to consider migrating from existing popular computer architectures like x86, Arm, MIPS and more to RISC-V
Download the Whitepaper
The Benefits of Hardware Multi-Threading
Increase Silicon Efficiency for Higher Data Processing with the Same Area and Power
Design and Innovate with MIPS Today
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