Company

Freedom to Innovate Compute

MIPS is a compute IP company with more than two decades of experience. Breaking down the barriers of closed and in-flexible architectures, MIPS designs efficient and configurable compute Cores for automotive, data center and embedded systems.

Vision: Accelerate compute density in the automotive, data center and embedded markets

Founded in 1984, MIPS-based chips can be found in billions of devices and systems around the world. Fast forward to today where the new compute era is marked by unprecedented technological advancements and growing demands of data-driven and AI-enabled systems. This is where traditional architectures are slowing down innovation as they struggle to meet high-performance and efficient high-density compute requirements.

MIPS is delivering a new approach that gives customers the freedom to innovate compute by enabling efficient data movement, real-time processing and low latency. This encompasses the freedom to select an open architecture, break down system bottlenecks, and not be forced to use a single ISA. MIPS solutions are based on open source industry standards such as the RISC-V architecture, enabling customers to innovate faster, more efficiently and push the boundaries of what’s achievable.

Leadership

Executive Team

Sameer Wasson

CEO

Sameer Wasson

CEO

Sameer is the CEO of MIPS. He previously spent 18 years at Texas Instruments (TI), where he was responsible for the company’s processors and high-performance microcontroller (MCU) businesses. In that role, Wasson re-established TI as a mainstream microprocessor (MPU) and MCU supplier for high-growth automotive and industrial markets. He also established the company’s footprint in embedded AI, software defined vehicles, and electrification. Prior to that, Sameer worked for TI’s Radar/mmWave Business Unit, responsible for establishing TI’s mmWave CMOS radar business focused on automotive and expanding into industrial markets. He also held management position at Communications Infrastructure Processors at TI. He holds a Master of Science degree in Electrical Engineering from Syracuse University and a Bachelor of Engineering in Electronics from Pune University.

Rosario Angeles

CFO

Rosario Angeles

CFO

Rosario Angeles has over 25 years of diverse experience in all facets of startup, corporate finance, management consulting, and operational advisory services. Prior to joining the company, Rosario held positions as finance officer of public and private companies in the telecommunications, information management, real estate development, and service industries. She is a graduate of the College of the Holy Spirit with a BS in Accountancy.

Durgesh Srivastava

CTO

Durgesh Srivastava

CTO

Durgesh is Chief Technology Officer at MIPS. He brings a wealth of expertise in systems architecture for data centers. Prior to his tenure at MIPS, Durgesh held a leadership position at Nvidia, where he served as a pivotal liaison between hyperscalars and the NVIDIA technical team, facilitating the seamless deployment of NVIDIA solutions. With an illustrious career spanning over 24 years at Intel Corp, Durgesh has made significant contributions to Data Center Products, multiple generations of Xeon processors, and automotive technology. His extensive portfolio boasts an impressive array of 30 patents across silicon, systems, and software domains. Durgesh is an alumnus of the prestigious IIT Kanpur, India, where he earned his Bachelor of Technology degree. He furthered his academic pursuits with a Master of Philosophy from the Hong Kong University of Science and Technology, Hong Kong, solidifying his expertise in cutting-edge technologies and systems architecture.

Brad Burgess

CPU Architecture

Brad Burgess

CPU Architecture

Brad oversees CPU architecture at MIPS. He has more than three decades of semiconductor and RISC-V industry experience. Previously he worked at SiFive, where he defined high-performance vector units and high-end out-of-order CPUs. Prior to that, he led design teams at Samsung, where he led the design of six generations of high-end CPUs for the Galaxy flagship phones. While at AMD, he led the Bobcat CPU architecture and oversaw subsequent CPUs that went into the PlayStation and XBOX. He led several PowerPC designs at Motorola including those that went into the original IMAC and Mars Rover. He holds Master and Bachelor degrees in Electrical Engineering from Texas A&M University, is a member of the IEEE, and has over two dozen patents.

Drew Barbier

Product Management

Drew Barbier

Product Management

Drew oversees product management at MIPS. He has over 15 years of industry experience focused on the processor IP market, including experience at both SiFive and Arm. After joining SiFive in early 2017, Drew leveraged his experience to help establish SiFive’s RISC-V processor IP portfolio. He led the Product Management team where he was responsible for defining and launching several key product families over the course of seven years. Prior to SiFive, Drew spent eight years at Arm supporting key accounts in a technical sales role, as well in application engineering supporting Arm’s embedded development tools. Drew is a Louisiana Cajun and holds a BS in Electrical Engineering and a Minor in Computer Science from Louisiana State University.

Mustafiz Choudhury

Strategy

Mustafiz Choudhury

Strategy

Mustafiz oversees business strategy at MIPS. He previously worked at SK Hynix’s Silicon Valley office and before that founded or worked in executive leadership positions at multiple startups including Silicon Spice and SandForce, and also held management positions at Broadcom and LSI Corp. He gained experience in venture capital investing and portfolio company management while at SKTA CVC and its accelerator. Mustafiz began his career with Intel where he was involved in designing the i486 and Pentium processors and led/co-led development of flagship products such the Pentium OverDrive, Pentium-II and Merced (IA-64) processors. Mustafiz has BS and MS degrees in Electrical and Computer Engineering and is a member of the IEEE and the IEEE Computer and Communication Societies. He holds more than a dozen patents in the areas of high-performance processor design, cache and bus protocols, and digital signal processing. Mustafiz is actively involved with non-profits that provide economically marginalized children with access to quality education.

Manav Mediratta

Software Management

Manav Mediratta

Software Management

Manav has over 20 years of semiconductor expertise. Manav oversees all aspects of MIPS’ software engineering and development functions. Additionally, Manav also serves as the site manager and leader of MIPS’ Software Center of Excellence located in Bengaluru.

Most recently he worked at Google in Bengaluru, India. Prior to Google, he held several management roles at Texas Instruments for more than 17 years, holding roles in the mmWave Sensor Business, Software and Systems for WiFi based IoT devices for the Connectivity Business, and for GPS/GLONASS receivers and Bluetooth/FM Connectivity Combo Business. He started his career at the Telecommunications and Networking Group at Indian Institute of Technology, Madras as a Communication Systems Engineer.

Manav holds Master and and Bachelor degrees in Electronics and Communication Systems.

Parthiv Pota

Hardware Engineering

Parthiv Pota

Hardware Engineering

Parthiv Pota oversees Hardware Engineering. Parthiv has been with MIPS for 13 years and has deep expertise in MIPS and RISC-V CPU and AI Architecture, Micro-architecture, RTL, logic, and physical design for high speed, high performance, multi-threaded, highly scalable IP and SoCs.

Prior to MIPS, Parthiv spent a decade at Sun Microsystems designing SPARC CPUs.

Parthiv holds a Bachelor’s degree in Electronics and Communication Engineering from Gujarat University, India and a masters in Electrical Engineering from Arizona State University.

Don Smith

Engineering Management

Don Smith

Engineering Management

Don Smith oversees engineering at MIPS. He previously worked for Wave Computing and before that was a leader in building a RISC-V CPU engineering team for Bitmain. Prior to that, Don spent 14 years leading engineering teams at Cypress Semiconductor and also oversaw Logic and Verification for Transmeta and led Engineering for MIPS processor developer Sandcraft. He has also held engineering management positions with Pyramid Technology and Unisys. Don holds a BS EECS from the University of California, Berkeley.

Nasr Ullah

Architecture and Performance

Nasr Ullah

Architecture and Performance

Nasr has over 35 years of experience in the semiconductor industry. Nasr manages MIPS’ Architecture and Performance Modeling divisions. In this role, he oversees all new IP roadmap product designs at MIPS.

Prior to joining MIPS, he led the performance architecture team for RISC-V Technology and Applications at SiFive, which helped develop the highest performance RISC-V processor in the world. Prior to SiFive, he held technical and product management roles for companies including Samsung Electronics, Freescale (now NXP) and Motorola. In his career, he has built and lead multiple systems and software teams including performance analysis, performance verification, performance and functional modeling, system simulation, power analysis, workload characterization, software enablement, compilers and application software for Motorola, the PowerPC Apple-Motorola-IBM Somerset Design Center, Freescale Semiconductor and Samsung Electronics, and SiFive.

Nasr serves as the Executive Board Chair for the IEEE International Performance Conference on Computers and Communications. He holds a Bachelor of in Electrical Engineering degree, a Master in Computer Engineering, and an Executive MBA from the University of Texas at Austin.

Vasanth Waran

Business Development

Vasanth Waran

Business Development

Vasanth leads Business Development at MIPS. Vasanth was previously at Renesas Electronics, where he led the High-Performance Compute Solutions for their Automotive Business Unit. Prior to this, Vasanth was an integral part of the Automotive team at Qualcomm and was responsible for building that business from ground up to the $30B+ pipeline of wins. He started his career at Intel Corp, with the 64b custom CPU team and continued with various other roles at Intel. Vasanth brings with him 22 years of experience in driving product & business success through strategic product management and business development.

Board of Directors

Desi Banatao

Chairman

Desi Banatao

Chairman

Desi is the Chairman of the Board. He was previously also Interim CEO. Prior to assuming the CEO role, Desi led the acquisition process of MIPS from Imagination in 2017. He has a broad range of experience in early stage technology startups both as an entrepreneur and investor as one of the founding partners in Tallwood Venture Capital. Desi holds a BS an MS in Materials Science and Engineering from UC Berkeley.

Sanjai Kohli

Board Member

Sanjai Kohli

Board Member

Sanjai Kohli is recognized as the father of commercial GPS for his fundamental technology contributions to GPS and wireless communications.

He was CEO of Wave Computing until June 2021, leading the successful turnaround/restructuring effort of MIPS and its pivot RISC-V. Prior to Wave, he was responsible for technology development of the Facebook Terragraph urban connectivity network, via acquisition of his company Inovi. He was previously Founder and CTO at SiRF, the company that created the commercial GPS market, from 1995 until March 2008. He also founded and successfully ran two other technology companies – WirelessHome and TrueSpan. Sanjai was awarded the European Inventor Award for making GPS a commercial product, and he holds 60 U.S. patents in GPS and communication technology. He is a graduate and distinguished alumnus of both the Indian Institute of Technology Bombay and Washington University in St. Louis. He is also an IEEE Fellow.

Sameer Wasson

Board Member

Partners

The leading provider of Embedded Development Tools & Services

Ashling

Ashling have been a leading provider of Embedded Development Tools & Services since 1982 with design centres in Limerick Ireland and Chennai India and sales and support offices in Europe, Asia Pacific, the Middle East and America. We have over thirty years’ experience in developing tools for embedded systems engineers including high-speed Debug and Trace Probes supporting a broad range of MCUs, SoCs and Soft (FPGA) based designs. Our software tools include IDEs, Debuggers, Compilers and Simulators and we support all the main embedded architectures including ARC, Arm, MIPS, Power Architecture and RISC-V through our RiscFree™ platform. We have a particular focus on RISC-V and are the first company to bring tools to the market supporting heterogenous debug of RISC-V cores along with cores from other vendors.

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The leading provider of RISC-V processor models

Imperas

Imperas is the leading provider of RISC-V processor models, hardware design verification solutions, and virtual prototypes for software simulation. Imperas, along with Open Virtual Platforms (OVP), promotes open-source model availability for a spectrum of processors, IP vendors, CPU architectures, system IP and reference platform models of processors and systems ranging from simple single core bare metal platforms to full heterogeneous multicore systems booting SMP Linux. All models are available from Imperas at www.imperas.com and the Open Virtual Platforms (OVP) website at www.OVPworld.org.

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RISC-V International is a global nonprofit association based in Switzerland

RISC-V

RISC-V International is a global nonprofit association based in Switzerland. Founded in 2015 as the RISC-V Foundation with 29 members, RISC-V is now a truly global organization with 2k+ members in more than 70 countries. Incorporated in Switzerland, RISC-V International is truly a global organization. As a non-profit, RISC-V International does not maintain any commercial interest in products or services. RISC-V also does not take a political position on behalf of any geography. We are proud to see organisations from around the world working together in this new era of processor innovation

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A recognized market-leading independent supplier of Security IP solutions

Silex Insight

Silex Insight is a recognized market-leading independent supplier of Security IP solutions for embedded systems. Highly scalable and flexible silicon proven Security IP for embedded systems used in the ever-growing connected world of the IoT. All the turn-key solutions are compliant with most common industry standards (NIST and others). IP integrators can benefit from decades of experience in security ASIC and FPGA design. The security platforms and solutions include flexible and high-performance crypto engines which are easy to integrate and an eSecure IP module that provides a complete security solution for all platforms. Developments take place at the headquarters near Brussels, Belgium.

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Leading in Real Time Embedded programming and development

Zoro

Leading in Real Time Embedded programming and development, Zoro Solutions provides embedded software engineering services from concept and specification to implementation and integration. We have experienced engineering resources with an in-depth knowledge in various embedded domains including: networking, processors, controller firmware and software development on various Real Time operations systems. We provide engineering services to the industry leading companies (military and commercial). We are offering several optional approaches to deliver your product to the market, in the best way to meet your needs, schedule and budget. Our experienced team of engineers comprises industry veterans with strong background and many years of experience, all worked in senior positions in the industry, under the supervision of our software architect and engineering team leaders, we provide the embedded software expertise to bring the project to successful completion.

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