IP Cores, A New Path for AI Compute

Physical AI is built on MIPS

Atlas IP	Physical AI Workload	µArchitecture Highlights	Instruction Set Architecture
M8500 High-Performance 32-bit Microcontroller	ACT Real-Time Control & Low Latency Event Processing	Field-Oriented Control Algorithm Acceleration Functional Safety (DCLS, ASIL‑D, ASIL‑B) Real-Time Multithreading (4-Threads per Core)	Industry Standard Open, Modular & Extensible Community Developed Standardized Programming Model Easy to Adopt & Use Common Code Bases Commercial & Open-Source Toolchains Software Defined Functionality Base Profile Compliant RISC-V Extensions Application Specific Instructions Workload Tuned µArchitectures
I8500 Embedded 64-bit Data Orchestration Processor	COMMUNICATE Low Latency, High Throughput Data Orchestration	Native Linux/RTOS/Bare-Metal OS Support 4-Threads per Core, 6-Core Clusters Scales up to 384 Clusters Native big-Endian Support
P8700 Performance Applications Processor	SENSE Data Aggregation & Control	2-Threads per Core 64-bit Out-of-Order Pipeline Functional Safety (ASIL‑B) Multicore Cluster scaling
S8200 Software-First AI Accelerator	THINK Embedded Neural Processing Unit	On-Device Modern AI (GPT, LLM/SLM/VLM & More) Area-Dense With Class-Leading Efficiency RISC‑V Vector & Matrix Extension Support

	Transportation	Robotics	Embedded	Technology
M8500 ACT	Embedded Control Unit On-board Battery Management Traction Invertor	Control Loops Safety Domain	Intelligent Power Management Energy Infrastructure SSD Channel Controller	High-Performance 32-bit Microcontroller Field-Oriented Control Algorithm Acceleration Functional Safety (DCLS, ASIL-D, ASIL-B) Real-Time Multithreading (4-Threads per Core)
I8500 COMMUNICATE	Zonal Gateway	Industrial Gateway	SSD Storage Controller Communications Infrastructure Intelligent Networking	Embedded 64-bit Data Orchestration Processor Native Linux/RTOS/Bare metal OS support 4-Threads per Core, 6-Core Clusters Scales up to 384 Clusters Native big-Endian support
P8700 SENSE	Data Movement Engine (ASIL)	Data Movement Engine (SIL)	Data Movement Engine for Smart NIC/DPU Embedded Applications Processor	Performance Applications Processor 2-Threads per Core 64-bit Out-of-Order Pipeline Functional Safety (ASIL-B) Multicore Cluster scaling
S8200 THINK	ADAS (Bird’s Eye View; OMS/DMS; LKA; Traffic Sign Recognition, etc.)	Predictive Maintenance Real-time Monitoring Vision/Language Models	On-Device Modern AI Inference	Embedded Neural Processing Unit Support Transformer & Language Models Area-dense with class-leading TOPS/w RISC-V Vector & Matrix extension support